xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun%YAML 1.2
3*4882a593Smuzhiyun---
4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/mmc/rockchip-dw-mshc.yaml#
5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml#
6*4882a593Smuzhiyun
7*4882a593Smuzhiyuntitle: Rockchip designware mobile storage host controller device tree bindings
8*4882a593Smuzhiyun
9*4882a593Smuzhiyundescription:
10*4882a593Smuzhiyun  Rockchip uses the Synopsys designware mobile storage host controller
11*4882a593Smuzhiyun  to interface a SoC with storage medium such as eMMC or SD/MMC cards.
12*4882a593Smuzhiyun  This file documents the combined properties for the core Synopsys dw mshc
13*4882a593Smuzhiyun  controller that are not already included in the synopsys-dw-mshc-common.yaml
14*4882a593Smuzhiyun  file and the Rockchip specific extensions.
15*4882a593Smuzhiyun
16*4882a593SmuzhiyunallOf:
17*4882a593Smuzhiyun  - $ref: "synopsys-dw-mshc-common.yaml#"
18*4882a593Smuzhiyun
19*4882a593Smuzhiyunmaintainers:
20*4882a593Smuzhiyun  - Heiko Stuebner <heiko@sntech.de>
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun# Everything else is described in the common file
23*4882a593Smuzhiyunproperties:
24*4882a593Smuzhiyun  compatible:
25*4882a593Smuzhiyun    oneOf:
26*4882a593Smuzhiyun      # for Rockchip RK2928 and before RK3288
27*4882a593Smuzhiyun      - const: rockchip,rk2928-dw-mshc
28*4882a593Smuzhiyun      # for Rockchip RK3288
29*4882a593Smuzhiyun      - const: rockchip,rk3288-dw-mshc
30*4882a593Smuzhiyun      - items:
31*4882a593Smuzhiyun          - enum:
32*4882a593Smuzhiyun            # for Rockchip PX30
33*4882a593Smuzhiyun              - rockchip,px30-dw-mshc
34*4882a593Smuzhiyun            # for Rockchip RK3036
35*4882a593Smuzhiyun              - rockchip,rk3036-dw-mshc
36*4882a593Smuzhiyun            # for Rockchip RK322x
37*4882a593Smuzhiyun              - rockchip,rk3228-dw-mshc
38*4882a593Smuzhiyun            # for Rockchip RK3308
39*4882a593Smuzhiyun              - rockchip,rk3308-dw-mshc
40*4882a593Smuzhiyun            # for Rockchip RK3328
41*4882a593Smuzhiyun              - rockchip,rk3328-dw-mshc
42*4882a593Smuzhiyun            # for Rockchip RK3368
43*4882a593Smuzhiyun              - rockchip,rk3368-dw-mshc
44*4882a593Smuzhiyun            # for Rockchip RK3399
45*4882a593Smuzhiyun              - rockchip,rk3399-dw-mshc
46*4882a593Smuzhiyun            # for Rockchip RV1108
47*4882a593Smuzhiyun              - rockchip,rv1108-dw-mshc
48*4882a593Smuzhiyun          - const: rockchip,rk3288-dw-mshc
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun  reg:
51*4882a593Smuzhiyun    maxItems: 1
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun  interrupts:
54*4882a593Smuzhiyun    maxItems: 1
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun  clocks:
57*4882a593Smuzhiyun    minItems: 2
58*4882a593Smuzhiyun    maxItems: 4
59*4882a593Smuzhiyun    description:
60*4882a593Smuzhiyun      Handle to "biu" and "ciu" clocks for the bus interface unit clock and
61*4882a593Smuzhiyun      the card interface unit clock. If "ciu-drive" and "ciu-sample" are
62*4882a593Smuzhiyun      specified in clock-names, it should also contain
63*4882a593Smuzhiyun      handles to these clocks.
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun  clock-names:
66*4882a593Smuzhiyun    minItems: 2
67*4882a593Smuzhiyun    items:
68*4882a593Smuzhiyun      - const: biu
69*4882a593Smuzhiyun      - const: ciu
70*4882a593Smuzhiyun      - const: ciu-drive
71*4882a593Smuzhiyun      - const: ciu-sample
72*4882a593Smuzhiyun    description:
73*4882a593Smuzhiyun      Apart from the clock-names "biu" and "ciu" two more clocks
74*4882a593Smuzhiyun      "ciu-drive" and "ciu-sample" are supported. They are used
75*4882a593Smuzhiyun      to control the clock phases, "ciu-sample" is required for tuning
76*4882a593Smuzhiyun      high speed modes.
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun  rockchip,default-sample-phase:
79*4882a593Smuzhiyun    $ref: /schemas/types.yaml#/definitions/uint32
80*4882a593Smuzhiyun    minimum: 0
81*4882a593Smuzhiyun    maximum: 360
82*4882a593Smuzhiyun    default: 0
83*4882a593Smuzhiyun    description:
84*4882a593Smuzhiyun      The default phase to set "ciu-sample" at probing,
85*4882a593Smuzhiyun      low speeds or in case where all phases work at tuning time.
86*4882a593Smuzhiyun      If not specified 0 deg will be used.
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun  rockchip,desired-num-phases:
89*4882a593Smuzhiyun    $ref: /schemas/types.yaml#/definitions/uint32
90*4882a593Smuzhiyun    minimum: 0
91*4882a593Smuzhiyun    maximum: 360
92*4882a593Smuzhiyun    default: 360
93*4882a593Smuzhiyun    description:
94*4882a593Smuzhiyun      The desired number of times that the host execute tuning when needed.
95*4882a593Smuzhiyun      If not specified, the host will do tuning for 360 times,
96*4882a593Smuzhiyun      namely tuning for each degree.
97*4882a593Smuzhiyun
98*4882a593Smuzhiyunrequired:
99*4882a593Smuzhiyun  - compatible
100*4882a593Smuzhiyun  - reg
101*4882a593Smuzhiyun  - interrupts
102*4882a593Smuzhiyun  - clocks
103*4882a593Smuzhiyun  - clock-names
104*4882a593Smuzhiyun
105*4882a593SmuzhiyununevaluatedProperties: false
106*4882a593Smuzhiyun
107*4882a593Smuzhiyunexamples:
108*4882a593Smuzhiyun  - |
109*4882a593Smuzhiyun    #include <dt-bindings/clock/rk3288-cru.h>
110*4882a593Smuzhiyun    #include <dt-bindings/interrupt-controller/arm-gic.h>
111*4882a593Smuzhiyun    #include <dt-bindings/interrupt-controller/irq.h>
112*4882a593Smuzhiyun    sdmmc: mmc@ff0c0000 {
113*4882a593Smuzhiyun      compatible = "rockchip,rk3288-dw-mshc";
114*4882a593Smuzhiyun      reg = <0xff0c0000 0x4000>;
115*4882a593Smuzhiyun      interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
116*4882a593Smuzhiyun      clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
117*4882a593Smuzhiyun               <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
118*4882a593Smuzhiyun      clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
119*4882a593Smuzhiyun      resets = <&cru SRST_MMC0>;
120*4882a593Smuzhiyun      reset-names = "reset";
121*4882a593Smuzhiyun      fifo-depth = <0x100>;
122*4882a593Smuzhiyun      max-frequency = <150000000>;
123*4882a593Smuzhiyun    };
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun...
126