xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*4882a593Smuzhiyun%YAML 1.2
3*4882a593Smuzhiyun---
4*4882a593Smuzhiyun$id: "http://devicetree.org/schemas/mmc/renesas,sdhi.yaml#"
5*4882a593Smuzhiyun$schema: "http://devicetree.org/meta-schemas/core.yaml#"
6*4882a593Smuzhiyun
7*4882a593Smuzhiyuntitle: Renesas SDHI SD/MMC controller
8*4882a593Smuzhiyun
9*4882a593Smuzhiyunmaintainers:
10*4882a593Smuzhiyun  - Wolfram Sang <wsa+renesas@sang-engineering.com>
11*4882a593Smuzhiyun
12*4882a593SmuzhiyunallOf:
13*4882a593Smuzhiyun  - $ref: "mmc-controller.yaml"
14*4882a593Smuzhiyun
15*4882a593Smuzhiyunproperties:
16*4882a593Smuzhiyun  compatible:
17*4882a593Smuzhiyun    oneOf:
18*4882a593Smuzhiyun      - items:
19*4882a593Smuzhiyun          - const: renesas,sdhi-sh73a0  # R-Mobile APE6
20*4882a593Smuzhiyun      - items:
21*4882a593Smuzhiyun          - const: renesas,sdhi-r7s72100 # RZ/A1H
22*4882a593Smuzhiyun      - items:
23*4882a593Smuzhiyun          - const: renesas,sdhi-r7s9210 # SH-Mobile AG5
24*4882a593Smuzhiyun      - items:
25*4882a593Smuzhiyun          - const: renesas,sdhi-r8a73a4 # R-Mobile APE6
26*4882a593Smuzhiyun      - items:
27*4882a593Smuzhiyun          - const: renesas,sdhi-r8a7740 # R-Mobile A1
28*4882a593Smuzhiyun      - items:
29*4882a593Smuzhiyun          - enum:
30*4882a593Smuzhiyun              - renesas,sdhi-r8a7778 # R-Car M1
31*4882a593Smuzhiyun              - renesas,sdhi-r8a7779 # R-Car H1
32*4882a593Smuzhiyun          - const: renesas,rcar-gen1-sdhi # R-Car Gen1
33*4882a593Smuzhiyun      - items:
34*4882a593Smuzhiyun          - enum:
35*4882a593Smuzhiyun              - renesas,sdhi-r8a7742  # RZ/G1H
36*4882a593Smuzhiyun              - renesas,sdhi-r8a7743  # RZ/G1M
37*4882a593Smuzhiyun              - renesas,sdhi-r8a7744  # RZ/G1N
38*4882a593Smuzhiyun              - renesas,sdhi-r8a7745  # RZ/G1E
39*4882a593Smuzhiyun              - renesas,sdhi-r8a77470 # RZ/G1C
40*4882a593Smuzhiyun              - renesas,sdhi-r8a7790  # R-Car H2
41*4882a593Smuzhiyun              - renesas,sdhi-r8a7791  # R-Car M2-W
42*4882a593Smuzhiyun              - renesas,sdhi-r8a7792  # R-Car V2H
43*4882a593Smuzhiyun              - renesas,sdhi-r8a7793  # R-Car M2-N
44*4882a593Smuzhiyun              - renesas,sdhi-r8a7794  # R-Car E2
45*4882a593Smuzhiyun          - const: renesas,rcar-gen2-sdhi # R-Car Gen2 and RZ/G1
46*4882a593Smuzhiyun      - items:
47*4882a593Smuzhiyun          - const: renesas,sdhi-mmc-r8a77470 # RZ/G1C (SDHI/MMC IP)
48*4882a593Smuzhiyun      - items:
49*4882a593Smuzhiyun          - enum:
50*4882a593Smuzhiyun              - renesas,sdhi-r8a774a1 # RZ/G2M
51*4882a593Smuzhiyun              - renesas,sdhi-r8a774b1 # RZ/G2N
52*4882a593Smuzhiyun              - renesas,sdhi-r8a774c0 # RZ/G2E
53*4882a593Smuzhiyun              - renesas,sdhi-r8a774e1 # RZ/G2H
54*4882a593Smuzhiyun              - renesas,sdhi-r8a7795  # R-Car H3
55*4882a593Smuzhiyun              - renesas,sdhi-r8a7796  # R-Car M3-W
56*4882a593Smuzhiyun              - renesas,sdhi-r8a77961 # R-Car M3-W+
57*4882a593Smuzhiyun              - renesas,sdhi-r8a77965 # R-Car M3-N
58*4882a593Smuzhiyun              - renesas,sdhi-r8a77970 # R-Car V3M
59*4882a593Smuzhiyun              - renesas,sdhi-r8a77980 # R-Car V3H
60*4882a593Smuzhiyun              - renesas,sdhi-r8a77990 # R-Car E3
61*4882a593Smuzhiyun              - renesas,sdhi-r8a77995 # R-Car D3
62*4882a593Smuzhiyun          - const: renesas,rcar-gen3-sdhi # R-Car Gen3 or RZ/G2
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun  reg:
65*4882a593Smuzhiyun    maxItems: 1
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun  interrupts:
68*4882a593Smuzhiyun    minItems: 1
69*4882a593Smuzhiyun    maxItems: 3
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun  clocks:
72*4882a593Smuzhiyun    minItems: 1
73*4882a593Smuzhiyun    maxItems: 2
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun  clock-names:
76*4882a593Smuzhiyun    minItems: 1
77*4882a593Smuzhiyun    maxItems: 2
78*4882a593Smuzhiyun    items:
79*4882a593Smuzhiyun      - const: core
80*4882a593Smuzhiyun      - const: cd
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun  dmas:
83*4882a593Smuzhiyun    minItems: 4
84*4882a593Smuzhiyun    maxItems: 4
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun  dma-names:
87*4882a593Smuzhiyun    minItems: 4
88*4882a593Smuzhiyun    maxItems: 4
89*4882a593Smuzhiyun    items:
90*4882a593Smuzhiyun      enum:
91*4882a593Smuzhiyun        - tx
92*4882a593Smuzhiyun        - rx
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun  power-domains:
95*4882a593Smuzhiyun    maxItems: 1
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun  resets:
98*4882a593Smuzhiyun    maxItems: 1
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun  pinctrl-0:
101*4882a593Smuzhiyun    minItems: 1
102*4882a593Smuzhiyun    maxItems: 2
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun  pinctrl-1:
105*4882a593Smuzhiyun    maxItems: 1
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun  pinctrl-names:
108*4882a593Smuzhiyun    minItems: 1
109*4882a593Smuzhiyun    maxItems: 2
110*4882a593Smuzhiyun    items:
111*4882a593Smuzhiyun      - const: default
112*4882a593Smuzhiyun      - const: state_uhs
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun  max-frequency: true
115*4882a593Smuzhiyun
116*4882a593Smuzhiyunrequired:
117*4882a593Smuzhiyun  - compatible
118*4882a593Smuzhiyun  - reg
119*4882a593Smuzhiyun  - interrupts
120*4882a593Smuzhiyun  - clocks
121*4882a593Smuzhiyun  - power-domains
122*4882a593Smuzhiyun
123*4882a593Smuzhiyunif:
124*4882a593Smuzhiyun  properties:
125*4882a593Smuzhiyun    compatible:
126*4882a593Smuzhiyun      items:
127*4882a593Smuzhiyun        enum:
128*4882a593Smuzhiyun          - renesas,sdhi-r7s72100
129*4882a593Smuzhiyun          - renesas,sdhi-r7s9210
130*4882a593Smuzhiyunthen:
131*4882a593Smuzhiyun  required:
132*4882a593Smuzhiyun    - clock-names
133*4882a593Smuzhiyun  description:
134*4882a593Smuzhiyun    The internal card detection logic that exists in these controllers is
135*4882a593Smuzhiyun    sectioned off to be run by a separate second clock source to allow
136*4882a593Smuzhiyun    the main core clock to be turned off to save power.
137*4882a593Smuzhiyun
138*4882a593SmuzhiyununevaluatedProperties: false
139*4882a593Smuzhiyun
140*4882a593Smuzhiyunexamples:
141*4882a593Smuzhiyun  - |
142*4882a593Smuzhiyun    #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
143*4882a593Smuzhiyun    #include <dt-bindings/interrupt-controller/arm-gic.h>
144*4882a593Smuzhiyun    #include <dt-bindings/power/r8a7790-sysc.h>
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun    sdhi0: mmc@ee100000 {
147*4882a593Smuzhiyun            compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
148*4882a593Smuzhiyun            reg = <0xee100000 0x328>;
149*4882a593Smuzhiyun            interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
150*4882a593Smuzhiyun            clocks = <&cpg CPG_MOD 314>;
151*4882a593Smuzhiyun            dmas = <&dmac0 0xcd>, <&dmac0 0xce>, <&dmac1 0xcd>, <&dmac1 0xce>;
152*4882a593Smuzhiyun            dma-names = "tx", "rx", "tx", "rx";
153*4882a593Smuzhiyun            max-frequency = <195000000>;
154*4882a593Smuzhiyun            power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
155*4882a593Smuzhiyun            resets = <&cpg 314>;
156*4882a593Smuzhiyun    };
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun    sdhi1: mmc@ee120000 {
159*4882a593Smuzhiyun             compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
160*4882a593Smuzhiyun             reg = <0xee120000 0x328>;
161*4882a593Smuzhiyun             interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
162*4882a593Smuzhiyun             clocks = <&cpg CPG_MOD 313>;
163*4882a593Smuzhiyun             dmas = <&dmac0 0xc9>, <&dmac0 0xca>, <&dmac1 0xc9>, <&dmac1 0xca>;
164*4882a593Smuzhiyun             dma-names = "tx", "rx", "tx", "rx";
165*4882a593Smuzhiyun             max-frequency = <195000000>;
166*4882a593Smuzhiyun             power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
167*4882a593Smuzhiyun             resets = <&cpg 313>;
168*4882a593Smuzhiyun    };
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun    sdhi2: mmc@ee140000 {
171*4882a593Smuzhiyun             compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
172*4882a593Smuzhiyun             reg = <0xee140000 0x100>;
173*4882a593Smuzhiyun             interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
174*4882a593Smuzhiyun             clocks = <&cpg CPG_MOD 312>;
175*4882a593Smuzhiyun             dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, <&dmac1 0xc1>, <&dmac1 0xc2>;
176*4882a593Smuzhiyun             dma-names = "tx", "rx", "tx", "rx";
177*4882a593Smuzhiyun             max-frequency = <97500000>;
178*4882a593Smuzhiyun             power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
179*4882a593Smuzhiyun             resets = <&cpg 312>;
180*4882a593Smuzhiyun     };
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun     sdhi3: mmc@ee160000 {
183*4882a593Smuzhiyun              compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
184*4882a593Smuzhiyun              reg = <0xee160000 0x100>;
185*4882a593Smuzhiyun              interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
186*4882a593Smuzhiyun              clocks = <&cpg CPG_MOD 311>;
187*4882a593Smuzhiyun              dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, <&dmac1 0xd3>, <&dmac1 0xd4>;
188*4882a593Smuzhiyun              dma-names = "tx", "rx", "tx", "rx";
189*4882a593Smuzhiyun              max-frequency = <97500000>;
190*4882a593Smuzhiyun              power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
191*4882a593Smuzhiyun              resets = <&cpg 311>;
192*4882a593Smuzhiyun    };
193