1*4882a593Smuzhiyun* Microchip PIC32 SDHCI Controller 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThis file documents differences between the core properties in mmc.txt 4*4882a593Smuzhiyunand the properties used by the sdhci-pic32 driver. 5*4882a593Smuzhiyun 6*4882a593SmuzhiyunRequired properties: 7*4882a593Smuzhiyun- compatible: Should be "microchip,pic32mzda-sdhci" 8*4882a593Smuzhiyun- interrupts: Should contain interrupt 9*4882a593Smuzhiyun- clock-names: Should be "base_clk", "sys_clk". 10*4882a593Smuzhiyun See: Documentation/devicetree/bindings/resource-names.txt 11*4882a593Smuzhiyun- clocks: Phandle to the clock. 12*4882a593Smuzhiyun See: Documentation/devicetree/bindings/clock/clock-bindings.txt 13*4882a593Smuzhiyun- pinctrl-names: A pinctrl state names "default" must be defined. 14*4882a593Smuzhiyun- pinctrl-0: Phandle referencing pin configuration of the SDHCI controller. 15*4882a593Smuzhiyun See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt 16*4882a593Smuzhiyun 17*4882a593SmuzhiyunExample: 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun sdhci@1f8ec000 { 20*4882a593Smuzhiyun compatible = "microchip,pic32mzda-sdhci"; 21*4882a593Smuzhiyun reg = <0x1f8ec000 0x100>; 22*4882a593Smuzhiyun interrupts = <191 IRQ_TYPE_LEVEL_HIGH>; 23*4882a593Smuzhiyun clocks = <&rootclk REF4CLK>, <&rootclk PB5CLK>; 24*4882a593Smuzhiyun clock-names = "base_clk", "sys_clk"; 25*4882a593Smuzhiyun bus-width = <4>; 26*4882a593Smuzhiyun cap-sd-highspeed; 27*4882a593Smuzhiyun pinctrl-names = "default"; 28*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_sdhc1>; 29*4882a593Smuzhiyun }; 30