1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0-or-later 2*4882a593Smuzhiyun# Copyright 2019 IBM Corp. 3*4882a593Smuzhiyun%YAML 1.2 4*4882a593Smuzhiyun--- 5*4882a593Smuzhiyun$id: http://devicetree.org/schemas/mmc/aspeed,sdhci.yaml# 6*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 7*4882a593Smuzhiyun 8*4882a593Smuzhiyuntitle: ASPEED SD/SDIO/MMC Controller 9*4882a593Smuzhiyun 10*4882a593Smuzhiyunmaintainers: 11*4882a593Smuzhiyun - Andrew Jeffery <andrew@aj.id.au> 12*4882a593Smuzhiyun - Ryan Chen <ryanchen.aspeed@gmail.com> 13*4882a593Smuzhiyun 14*4882a593Smuzhiyundescription: |+ 15*4882a593Smuzhiyun The ASPEED SD/SDIO/eMMC controller exposes two slots implementing the SDIO 16*4882a593Smuzhiyun Host Specification v2.00, with 1 or 4 bit data buses, or an 8 bit data bus if 17*4882a593Smuzhiyun only a single slot is enabled. 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun The two slots are supported by a common configuration area. As the SDHCIs for 20*4882a593Smuzhiyun the slots are dependent on the common configuration area, they are described 21*4882a593Smuzhiyun as child nodes. 22*4882a593Smuzhiyun 23*4882a593Smuzhiyunproperties: 24*4882a593Smuzhiyun compatible: 25*4882a593Smuzhiyun enum: 26*4882a593Smuzhiyun - aspeed,ast2400-sd-controller 27*4882a593Smuzhiyun - aspeed,ast2500-sd-controller 28*4882a593Smuzhiyun - aspeed,ast2600-sd-controller 29*4882a593Smuzhiyun reg: 30*4882a593Smuzhiyun maxItems: 1 31*4882a593Smuzhiyun description: Common configuration registers 32*4882a593Smuzhiyun "#address-cells": 33*4882a593Smuzhiyun const: 1 34*4882a593Smuzhiyun "#size-cells": 35*4882a593Smuzhiyun const: 1 36*4882a593Smuzhiyun ranges: true 37*4882a593Smuzhiyun clocks: 38*4882a593Smuzhiyun maxItems: 1 39*4882a593Smuzhiyun description: The SD/SDIO controller clock gate 40*4882a593Smuzhiyun 41*4882a593SmuzhiyunpatternProperties: 42*4882a593Smuzhiyun "^sdhci@[0-9a-f]+$": 43*4882a593Smuzhiyun type: object 44*4882a593Smuzhiyun $ref: mmc-controller.yaml 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun properties: 47*4882a593Smuzhiyun compatible: 48*4882a593Smuzhiyun enum: 49*4882a593Smuzhiyun - aspeed,ast2400-sdhci 50*4882a593Smuzhiyun - aspeed,ast2500-sdhci 51*4882a593Smuzhiyun - aspeed,ast2600-sdhci 52*4882a593Smuzhiyun reg: 53*4882a593Smuzhiyun maxItems: 1 54*4882a593Smuzhiyun description: The SDHCI registers 55*4882a593Smuzhiyun clocks: 56*4882a593Smuzhiyun maxItems: 1 57*4882a593Smuzhiyun description: The SD bus clock 58*4882a593Smuzhiyun interrupts: 59*4882a593Smuzhiyun maxItems: 1 60*4882a593Smuzhiyun description: The SD interrupt shared between both slots 61*4882a593Smuzhiyun sdhci,auto-cmd12: 62*4882a593Smuzhiyun type: boolean 63*4882a593Smuzhiyun description: Specifies that controller should use auto CMD12 64*4882a593Smuzhiyun required: 65*4882a593Smuzhiyun - compatible 66*4882a593Smuzhiyun - reg 67*4882a593Smuzhiyun - clocks 68*4882a593Smuzhiyun - interrupts 69*4882a593Smuzhiyun 70*4882a593SmuzhiyunadditionalProperties: false 71*4882a593Smuzhiyun 72*4882a593Smuzhiyunrequired: 73*4882a593Smuzhiyun - compatible 74*4882a593Smuzhiyun - reg 75*4882a593Smuzhiyun - "#address-cells" 76*4882a593Smuzhiyun - "#size-cells" 77*4882a593Smuzhiyun - ranges 78*4882a593Smuzhiyun - clocks 79*4882a593Smuzhiyun 80*4882a593Smuzhiyunexamples: 81*4882a593Smuzhiyun - | 82*4882a593Smuzhiyun #include <dt-bindings/clock/aspeed-clock.h> 83*4882a593Smuzhiyun sdc@1e740000 { 84*4882a593Smuzhiyun compatible = "aspeed,ast2500-sd-controller"; 85*4882a593Smuzhiyun reg = <0x1e740000 0x100>; 86*4882a593Smuzhiyun #address-cells = <1>; 87*4882a593Smuzhiyun #size-cells = <1>; 88*4882a593Smuzhiyun ranges = <0 0x1e740000 0x20000>; 89*4882a593Smuzhiyun clocks = <&syscon ASPEED_CLK_GATE_SDCLK>; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun sdhci0: sdhci@100 { 92*4882a593Smuzhiyun compatible = "aspeed,ast2500-sdhci"; 93*4882a593Smuzhiyun reg = <0x100 0x100>; 94*4882a593Smuzhiyun interrupts = <26>; 95*4882a593Smuzhiyun sdhci,auto-cmd12; 96*4882a593Smuzhiyun clocks = <&syscon ASPEED_CLK_SDIO>; 97*4882a593Smuzhiyun }; 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun sdhci1: sdhci@200 { 100*4882a593Smuzhiyun compatible = "aspeed,ast2500-sdhci"; 101*4882a593Smuzhiyun reg = <0x200 0x100>; 102*4882a593Smuzhiyun interrupts = <26>; 103*4882a593Smuzhiyun sdhci,auto-cmd12; 104*4882a593Smuzhiyun clocks = <&syscon ASPEED_CLK_SDIO>; 105*4882a593Smuzhiyun }; 106*4882a593Smuzhiyun }; 107