1*4882a593Smuzhiyun* Xilinx SDFEC(16nm) IP * 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThe Soft Decision Forward Error Correction (SDFEC) Engine is a Hard IP block 4*4882a593Smuzhiyunwhich provides high-throughput LDPC and Turbo Code implementations. 5*4882a593SmuzhiyunThe LDPC decode & encode functionality is capable of covering a range of 6*4882a593Smuzhiyuncustomer specified Quasi-cyclic (QC) codes. The Turbo decode functionality 7*4882a593Smuzhiyunprincipally covers codes used by LTE. The FEC Engine offers significant 8*4882a593Smuzhiyunpower and area savings versus implementations done in the FPGA fabric. 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun 11*4882a593SmuzhiyunRequired properties: 12*4882a593Smuzhiyun- compatible: Must be "xlnx,sd-fec-1.1" 13*4882a593Smuzhiyun- clock-names : List of input clock names from the following: 14*4882a593Smuzhiyun - "core_clk", Main processing clock for processing core (required) 15*4882a593Smuzhiyun - "s_axi_aclk", AXI4-Lite memory-mapped slave interface clock (required) 16*4882a593Smuzhiyun - "s_axis_din_aclk", DIN AXI4-Stream Slave interface clock (optional) 17*4882a593Smuzhiyun - "s_axis_din_words-aclk", DIN_WORDS AXI4-Stream Slave interface clock (optional) 18*4882a593Smuzhiyun - "s_axis_ctrl_aclk", Control input AXI4-Stream Slave interface clock (optional) 19*4882a593Smuzhiyun - "m_axis_dout_aclk", DOUT AXI4-Stream Master interface clock (optional) 20*4882a593Smuzhiyun - "m_axis_dout_words_aclk", DOUT_WORDS AXI4-Stream Master interface clock (optional) 21*4882a593Smuzhiyun - "m_axis_status_aclk", Status output AXI4-Stream Master interface clock (optional) 22*4882a593Smuzhiyun- clocks : Clock phandles (see clock_bindings.txt for details). 23*4882a593Smuzhiyun- reg: Should contain Xilinx SDFEC 16nm Hardened IP block registers 24*4882a593Smuzhiyun location and length. 25*4882a593Smuzhiyun- xlnx,sdfec-code : Should contain "ldpc" or "turbo" to describe the codes 26*4882a593Smuzhiyun being used. 27*4882a593Smuzhiyun- xlnx,sdfec-din-words : A value 0 indicates that the DIN_WORDS interface is 28*4882a593Smuzhiyun driven with a fixed value and is not present on the device, a value of 1 29*4882a593Smuzhiyun configures the DIN_WORDS to be block based, while a value of 2 configures the 30*4882a593Smuzhiyun DIN_WORDS input to be supplied for each AXI transaction. 31*4882a593Smuzhiyun- xlnx,sdfec-din-width : Configures the DIN AXI stream where a value of 1 32*4882a593Smuzhiyun configures a width of "1x128b", 2 a width of "2x128b" and 4 configures a width 33*4882a593Smuzhiyun of "4x128b". 34*4882a593Smuzhiyun- xlnx,sdfec-dout-words : A value 0 indicates that the DOUT_WORDS interface is 35*4882a593Smuzhiyun driven with a fixed value and is not present on the device, a value of 1 36*4882a593Smuzhiyun configures the DOUT_WORDS to be block based, while a value of 2 configures the 37*4882a593Smuzhiyun DOUT_WORDS input to be supplied for each AXI transaction. 38*4882a593Smuzhiyun- xlnx,sdfec-dout-width : Configures the DOUT AXI stream where a value of 1 39*4882a593Smuzhiyun configures a width of "1x128b", 2 a width of "2x128b" and 4 configures a width 40*4882a593Smuzhiyun of "4x128b". 41*4882a593SmuzhiyunOptional properties: 42*4882a593Smuzhiyun- interrupts: should contain SDFEC interrupt number 43*4882a593Smuzhiyun 44*4882a593SmuzhiyunExample 45*4882a593Smuzhiyun--------------------------------------- 46*4882a593Smuzhiyun sd_fec_0: sd-fec@a0040000 { 47*4882a593Smuzhiyun compatible = "xlnx,sd-fec-1.1"; 48*4882a593Smuzhiyun clock-names = "core_clk","s_axi_aclk","s_axis_ctrl_aclk","s_axis_din_aclk","m_axis_status_aclk","m_axis_dout_aclk"; 49*4882a593Smuzhiyun clocks = <&misc_clk_2>,<&misc_clk_0>,<&misc_clk_1>,<&misc_clk_1>,<&misc_clk_1>, <&misc_clk_1>; 50*4882a593Smuzhiyun reg = <0x0 0xa0040000 0x0 0x40000>; 51*4882a593Smuzhiyun interrupt-parent = <&axi_intc>; 52*4882a593Smuzhiyun interrupts = <1 0>; 53*4882a593Smuzhiyun xlnx,sdfec-code = "ldpc"; 54*4882a593Smuzhiyun xlnx,sdfec-din-words = <0>; 55*4882a593Smuzhiyun xlnx,sdfec-din-width = <2>; 56*4882a593Smuzhiyun xlnx,sdfec-dout-words = <0>; 57*4882a593Smuzhiyun xlnx,sdfec-dout-width = <1>; 58*4882a593Smuzhiyun }; 59