1*4882a593SmuzhiyunNVIDIA Tegra APBMISC block 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun- compatible: Must be: 5*4882a593Smuzhiyun - Tegra20: "nvidia,tegra20-apbmisc" 6*4882a593Smuzhiyun - Tegra30: "nvidia,tegra30-apbmisc", "nvidia,tegra20-apbmisc" 7*4882a593Smuzhiyun - Tegra114: "nvidia,tegra114-apbmisc", "nvidia,tegra20-apbmisc" 8*4882a593Smuzhiyun - Tegra124: "nvidia,tegra124-apbmisc", "nvidia,tegra20-apbmisc" 9*4882a593Smuzhiyun - Tegra132: "nvidia,tegra124-apbmisc", "nvidia,tegra20-apbmisc" 10*4882a593Smuzhiyun - Tegra210: "nvidia,tegra210-apbmisc", "nvidia,tegra20-apbmisc" 11*4882a593Smuzhiyun- reg: Should contain 2 entries: the first entry gives the physical address 12*4882a593Smuzhiyun and length of the registers which contain revision and debug features. 13*4882a593Smuzhiyun The second entry gives the physical address and length of the 14*4882a593Smuzhiyun registers indicating the strapping options. 15*4882a593Smuzhiyun 16*4882a593SmuzhiyunOptional properties: 17*4882a593Smuzhiyun- nvidia,long-ram-code: If present, the RAM code is long (4 bit). If not, short (2 bit). 18