1*4882a593SmuzhiyunNVIDIA Tegra186 (and later) MISC register block 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThe MISC register block found on Tegra186 and later SoCs contains registers 4*4882a593Smuzhiyunthat can be used to identify a given chip and various strapping options. 5*4882a593Smuzhiyun 6*4882a593SmuzhiyunRequired properties: 7*4882a593Smuzhiyun- compatible: Must be: 8*4882a593Smuzhiyun - Tegra186: "nvidia,tegra186-misc" 9*4882a593Smuzhiyun - Tegra194: "nvidia,tegra194-misc" 10*4882a593Smuzhiyun - Tegra234: "nvidia,tegra234-misc" 11*4882a593Smuzhiyun- reg: Should contain 2 entries: The first entry gives the physical address 12*4882a593Smuzhiyun and length of the register region which contains revision and debug 13*4882a593Smuzhiyun features. The second entry specifies the physical address and length 14*4882a593Smuzhiyun of the register region indicating the strapping options. 15