1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2*4882a593Smuzhiyun# Copyright 2019 Linaro Ltd. 3*4882a593Smuzhiyun%YAML 1.2 4*4882a593Smuzhiyun--- 5*4882a593Smuzhiyun$id: "http://devicetree.org/schemas/misc/intel,ixp4xx-ahb-queue-manager.yaml#" 6*4882a593Smuzhiyun$schema: "http://devicetree.org/meta-schemas/core.yaml#" 7*4882a593Smuzhiyun 8*4882a593Smuzhiyuntitle: Intel IXP4xx AHB Queue Manager 9*4882a593Smuzhiyun 10*4882a593Smuzhiyunmaintainers: 11*4882a593Smuzhiyun - Linus Walleij <linus.walleij@linaro.org> 12*4882a593Smuzhiyun 13*4882a593Smuzhiyundescription: | 14*4882a593Smuzhiyun The IXP4xx AHB Queue Manager maintains queues as circular buffers in 15*4882a593Smuzhiyun an 8KB embedded SRAM along with hardware pointers. It is used by both 16*4882a593Smuzhiyun the XScale processor and the NPEs (Network Processing Units) in the 17*4882a593Smuzhiyun IXP4xx for accelerating queues, especially for networking. Clients pick 18*4882a593Smuzhiyun queues from the queue manager with foo-queue = <&qmgr N> where the 19*4882a593Smuzhiyun &qmgr is a phandle to the queue manager and N is the queue resource 20*4882a593Smuzhiyun number. The queue resources available and their specific purpose 21*4882a593Smuzhiyun on a certain IXP4xx system will vary. 22*4882a593Smuzhiyun 23*4882a593Smuzhiyunproperties: 24*4882a593Smuzhiyun compatible: 25*4882a593Smuzhiyun items: 26*4882a593Smuzhiyun - const: intel,ixp4xx-ahb-queue-manager 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun reg: 29*4882a593Smuzhiyun maxItems: 1 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun interrupts: 32*4882a593Smuzhiyun items: 33*4882a593Smuzhiyun - description: Interrupt for queues 0-31 34*4882a593Smuzhiyun - description: Interrupt for queues 32-63 35*4882a593Smuzhiyun 36*4882a593Smuzhiyunrequired: 37*4882a593Smuzhiyun - compatible 38*4882a593Smuzhiyun - reg 39*4882a593Smuzhiyun - interrupts 40*4882a593Smuzhiyun 41*4882a593SmuzhiyunadditionalProperties: false 42*4882a593Smuzhiyun 43*4882a593Smuzhiyunexamples: 44*4882a593Smuzhiyun - | 45*4882a593Smuzhiyun #include <dt-bindings/interrupt-controller/irq.h> 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun qmgr: queue-manager@60000000 { 48*4882a593Smuzhiyun compatible = "intel,ixp4xx-ahb-queue-manager"; 49*4882a593Smuzhiyun reg = <0x60000000 0x4000>; 50*4882a593Smuzhiyun interrupts = <3 IRQ_TYPE_LEVEL_HIGH>, <4 IRQ_TYPE_LEVEL_HIGH>; 51*4882a593Smuzhiyun }; 52