1*4882a593Smuzhiyun* ASPEED AST2400 and AST2500 coprocessor interrupt controller 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThis file describes the bindings for the interrupt controller present 4*4882a593Smuzhiyunin the AST2400 and AST2500 BMC SoCs which provides interrupt to the 5*4882a593SmuzhiyunColdFire coprocessor. 6*4882a593Smuzhiyun 7*4882a593SmuzhiyunIt is not a normal interrupt controller and it would be rather 8*4882a593Smuzhiyuninconvenient to create an interrupt tree for it as it somewhat shares 9*4882a593Smuzhiyunsome of the same sources as the main ARM interrupt controller but with 10*4882a593Smuzhiyundifferent numbers. 11*4882a593Smuzhiyun 12*4882a593SmuzhiyunThe AST2500 supports a SW generated interrupt 13*4882a593Smuzhiyun 14*4882a593SmuzhiyunRequired properties: 15*4882a593Smuzhiyun- reg: address and length of the register for the device. 16*4882a593Smuzhiyun- compatible: "aspeed,cvic" and one of: 17*4882a593Smuzhiyun "aspeed,ast2400-cvic" 18*4882a593Smuzhiyun or 19*4882a593Smuzhiyun "aspeed,ast2500-cvic" 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun- valid-sources: One cell, bitmap of supported sources for the implementation 22*4882a593Smuzhiyun 23*4882a593SmuzhiyunOptional properties; 24*4882a593Smuzhiyun- copro-sw-interrupts: List of interrupt numbers that can be used as 25*4882a593Smuzhiyun SW interrupts from the ARM to the coprocessor. 26*4882a593Smuzhiyun (AST2500 only) 27*4882a593Smuzhiyun 28*4882a593SmuzhiyunExample: 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun cvic: copro-interrupt-controller@1e6c2000 { 31*4882a593Smuzhiyun compatible = "aspeed,ast2500-cvic"; 32*4882a593Smuzhiyun valid-sources = <0xffffffff>; 33*4882a593Smuzhiyun copro-sw-interrupts = <1>; 34*4882a593Smuzhiyun reg = <0x1e6c2000 0x80>; 35*4882a593Smuzhiyun }; 36