1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/mips/ingenic/ingenic,cpu.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Bindings for Ingenic XBurst family CPUs 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyundescription: 13*4882a593Smuzhiyun Ingenic XBurst family CPUs shall have the following properties. 14*4882a593Smuzhiyun 15*4882a593Smuzhiyunproperties: 16*4882a593Smuzhiyun compatible: 17*4882a593Smuzhiyun oneOf: 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun - description: Ingenic XBurst®1 CPU Cores 20*4882a593Smuzhiyun enum: 21*4882a593Smuzhiyun - ingenic,xburst-mxu1.0 22*4882a593Smuzhiyun - ingenic,xburst-fpu1.0-mxu1.1 23*4882a593Smuzhiyun - ingenic,xburst-fpu2.0-mxu2.0 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun - description: Ingenic XBurst®2 CPU Cores 26*4882a593Smuzhiyun enum: 27*4882a593Smuzhiyun - ingenic,xburst2-fpu2.1-mxu2.1-smt 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun reg: 30*4882a593Smuzhiyun maxItems: 1 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun clocks: 33*4882a593Smuzhiyun maxItems: 1 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun device_type: true 36*4882a593Smuzhiyun 37*4882a593Smuzhiyunrequired: 38*4882a593Smuzhiyun - device_type 39*4882a593Smuzhiyun - compatible 40*4882a593Smuzhiyun - reg 41*4882a593Smuzhiyun - clocks 42*4882a593Smuzhiyun 43*4882a593SmuzhiyunadditionalProperties: false 44*4882a593Smuzhiyun 45*4882a593Smuzhiyunexamples: 46*4882a593Smuzhiyun - | 47*4882a593Smuzhiyun #include <dt-bindings/clock/jz4780-cgu.h> 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun cpus { 50*4882a593Smuzhiyun #address-cells = <1>; 51*4882a593Smuzhiyun #size-cells = <0>; 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun cpu0: cpu@0 { 54*4882a593Smuzhiyun device_type = "cpu"; 55*4882a593Smuzhiyun compatible = "ingenic,xburst-fpu1.0-mxu1.1"; 56*4882a593Smuzhiyun reg = <0>; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun clocks = <&cgu JZ4780_CLK_CPU>; 59*4882a593Smuzhiyun }; 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun cpu1: cpu@1 { 62*4882a593Smuzhiyun device_type = "cpu"; 63*4882a593Smuzhiyun compatible = "ingenic,xburst-fpu1.0-mxu1.1"; 64*4882a593Smuzhiyun reg = <1>; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun clocks = <&cgu JZ4780_CLK_CORE1>; 67*4882a593Smuzhiyun }; 68*4882a593Smuzhiyun }; 69*4882a593Smuzhiyun... 70