1*4882a593SmuzhiyunMIPS CPU interrupt controller 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunOn MIPS the mips_cpu_irq_of_init() helper can be used to initialize the 8 CPU 4*4882a593SmuzhiyunIRQs from a devicetree file and create a irq_domain for IRQ controller. 5*4882a593Smuzhiyun 6*4882a593SmuzhiyunWith the irq_domain in place we can describe how the 8 IRQs are wired to the 7*4882a593Smuzhiyunplatforms internal interrupt controller cascade. 8*4882a593Smuzhiyun 9*4882a593SmuzhiyunBelow is an example of a platform describing the cascade inside the devicetree 10*4882a593Smuzhiyunand the code used to load it inside arch_init_irq(). 11*4882a593Smuzhiyun 12*4882a593SmuzhiyunRequired properties: 13*4882a593Smuzhiyun- compatible : Should be "mti,cpu-interrupt-controller" 14*4882a593Smuzhiyun 15*4882a593SmuzhiyunExample devicetree: 16*4882a593Smuzhiyun cpu-irq: cpu-irq { 17*4882a593Smuzhiyun #address-cells = <0>; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun interrupt-controller; 20*4882a593Smuzhiyun #interrupt-cells = <1>; 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun compatible = "mti,cpu-interrupt-controller"; 23*4882a593Smuzhiyun }; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun intc: intc@200 { 26*4882a593Smuzhiyun compatible = "ralink,rt2880-intc"; 27*4882a593Smuzhiyun reg = <0x200 0x100>; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun interrupt-controller; 30*4882a593Smuzhiyun #interrupt-cells = <1>; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun interrupt-parent = <&cpu-irq>; 33*4882a593Smuzhiyun interrupts = <2>; 34*4882a593Smuzhiyun }; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun 37*4882a593SmuzhiyunExample platform irq.c: 38*4882a593Smuzhiyunstatic struct of_device_id __initdata of_irq_ids[] = { 39*4882a593Smuzhiyun { .compatible = "mti,cpu-interrupt-controller", .data = mips_cpu_irq_of_init }, 40*4882a593Smuzhiyun { .compatible = "ralink,rt2880-intc", .data = intc_of_init }, 41*4882a593Smuzhiyun {}, 42*4882a593Smuzhiyun}; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyunvoid __init arch_init_irq(void) 45*4882a593Smuzhiyun{ 46*4882a593Smuzhiyun of_irq_init(of_irq_ids); 47*4882a593Smuzhiyun} 48