xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mips/cavium/ciu.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1*4882a593Smuzhiyun* Central Interrupt Unit
2*4882a593Smuzhiyun
3*4882a593SmuzhiyunProperties:
4*4882a593Smuzhiyun- compatible: "cavium,octeon-3860-ciu"
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun  Compatibility with all cn3XXX, cn5XXX and cn63XX SOCs.
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun- interrupt-controller:  This is an interrupt controller.
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun- reg: The base address of the CIU's register bank.
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun- #interrupt-cells: Must be <2>.  The first cell is the bank within
13*4882a593Smuzhiyun   the CIU and may have a value of 0 or 1.  The second cell is the bit
14*4882a593Smuzhiyun   within the bank and may have a value between 0 and 63.
15*4882a593Smuzhiyun
16*4882a593SmuzhiyunExample:
17*4882a593Smuzhiyun	interrupt-controller@1070000000000 {
18*4882a593Smuzhiyun		compatible = "cavium,octeon-3860-ciu";
19*4882a593Smuzhiyun		interrupt-controller;
20*4882a593Smuzhiyun		/* Interrupts are specified by two parts:
21*4882a593Smuzhiyun		 * 1) Controller register (0 or 1)
22*4882a593Smuzhiyun		 * 2) Bit within the register (0..63)
23*4882a593Smuzhiyun		 */
24*4882a593Smuzhiyun		#interrupt-cells = <2>;
25*4882a593Smuzhiyun		reg = <0x10700 0x00000000 0x0 0x7000>;
26*4882a593Smuzhiyun	};
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