xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mfd/rk809.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593SmuzhiyunRK809 Power Management Integrated Circuit
2*4882a593Smuzhiyun
3*4882a593SmuzhiyunRequired properties:
4*4882a593Smuzhiyun- compatible: "rockchip,rk809"
5*4882a593Smuzhiyun- reg: I2C slave address
6*4882a593Smuzhiyun- interrupt-parent: The parent interrupt controller.
7*4882a593Smuzhiyun- interrupts: the interrupt outputs of the controller.
8*4882a593Smuzhiyun- #clock-cells: from common clock binding; shall be set to 1 (multiple clock
9*4882a593Smuzhiyun  outputs). See <dt-bindings/clock/rockchip,rk808.h> for clock IDs.
10*4882a593Smuzhiyun
11*4882a593SmuzhiyunOptional properties:
12*4882a593Smuzhiyun- clock-output-names: From common clock binding to override the
13*4882a593Smuzhiyun  default output clock name
14*4882a593Smuzhiyun- rockchip,system-power-controller: Telling whether or not this pmic is controlling
15*4882a593Smuzhiyun  the system power.
16*4882a593Smuzhiyun- vcc1-supply:  The input supply for DCDC_REG1
17*4882a593Smuzhiyun- vcc2-supply:  The input supply for DCDC_REG2
18*4882a593Smuzhiyun- vcc3-supply:  The input supply for DCDC_REG3
19*4882a593Smuzhiyun- vcc4-supply:  The input supply for DCDC_REG4
20*4882a593Smuzhiyun- vcc5-supply:  The input supply for LDO_REG1, LDO_REG2, LDO_REG3
21*4882a593Smuzhiyun- vcc6-supply:  The input supply for LDO_REG4, LDO_REG5, LDO_REG6
22*4882a593Smuzhiyun- vcc7-supply:  The input supply for LDO_REG7, LDO_REG8, LDO_REG9
23*4882a593Smuzhiyun- vcc8-supply:  The input supply for SWITCH_REG1
24*4882a593Smuzhiyun- vcc9-supply:  The input supply for DCDC_REG5, SWITCH_REG2
25*4882a593Smuzhiyun
26*4882a593SmuzhiyunRegulators: All the regulators of RK809 to be instantiated shall be
27*4882a593Smuzhiyunlisted in a child node named 'regulators'. Each regulator is represented
28*4882a593Smuzhiyunby a child node of the 'regulators' node.
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun	regulator-name {
31*4882a593Smuzhiyun		/* standard regulator bindings here */
32*4882a593Smuzhiyun	};
33*4882a593Smuzhiyun
34*4882a593SmuzhiyunFollowing regulators of the RK809 PMIC block are supported. Note that
35*4882a593Smuzhiyunthe 'n' in regulator name, as in DCDC_REGn or LDOn, represents the DCDC or LDO
36*4882a593Smuzhiyunnumber as described in RK808 datasheet.
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun	- DCDC_REGn
39*4882a593Smuzhiyun		- valid values for n are 1 to 5.
40*4882a593Smuzhiyun	- LDO_REGn
41*4882a593Smuzhiyun		- valid values for n are 1 to 9.
42*4882a593Smuzhiyun	- SWITCH_REGn
43*4882a593Smuzhiyun		- valid values for n are 1 to 2.
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun    The gpio_slp pin is for controlling the pmic states, as below:
46*4882a593Smuzhiyun        reset
47*4882a593Smuzhiyun        power down
48*4882a593Smuzhiyun        sleep
49*4882a593Smuzhiyun
50*4882a593SmuzhiyunStandard regulator bindings are used inside regulator subnodes. Check
51*4882a593Smuzhiyun  Documentation/devicetree/bindings/regulator/regulator.txt
52*4882a593Smuzhiyunfor more details
53*4882a593Smuzhiyun
54*4882a593SmuzhiyunExample:
55*4882a593Smuzhiyun	rk809: pmic@20 {
56*4882a593Smuzhiyun		compatible = "rockchip,rk809";
57*4882a593Smuzhiyun		reg = <0x20>;
58*4882a593Smuzhiyun		interrupt-parent = <&gpio0>;
59*4882a593Smuzhiyun		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
60*4882a593Smuzhiyun		pinctrl-names = "default", "pmic-sleep",
61*4882a593Smuzhiyun				"pmic-power-off", "pmic-reset";
62*4882a593Smuzhiyun		pinctrl-0 = <&pmic_int>;
63*4882a593Smuzhiyun		pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>;
64*4882a593Smuzhiyun		pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>;
65*4882a593Smuzhiyun		pinctrl-3 = <&soc_slppin_rst>, <&rk817_slppin_rst>;
66*4882a593Smuzhiyun		rockchip,system-power-controller;
67*4882a593Smuzhiyun		wakeup-source;
68*4882a593Smuzhiyun		#clock-cells = <1>;
69*4882a593Smuzhiyun		clock-output-names = "rk808-clkout1", "rk808-clkout2";
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun		vcc1-supply = <&vcc5v0_sys>;
72*4882a593Smuzhiyun		vcc2-supply = <&vcc5v0_sys>;
73*4882a593Smuzhiyun		vcc3-supply = <&vcc5v0_sys>;
74*4882a593Smuzhiyun		vcc4-supply = <&vcc5v0_sys>;
75*4882a593Smuzhiyun		vcc5-supply = <&vcc3v3_sys>;
76*4882a593Smuzhiyun		vcc6-supply = <&vcc3v3_sys>;
77*4882a593Smuzhiyun		vcc7-supply = <&vcc3v3_sys>;
78*4882a593Smuzhiyun		vcc8-supply = <&vcc3v3_sys>;
79*4882a593Smuzhiyun		vcc9-supply = <&vcc5v0_sys>;
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun		pwrkey {
82*4882a593Smuzhiyun			status = "okay";
83*4882a593Smuzhiyun		};
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun		pinctrl_rk8xx: pinctrl_rk8xx {
86*4882a593Smuzhiyun			gpio-controller;
87*4882a593Smuzhiyun			#gpio-cells = <2>;
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun			rk817_slppin_null: rk817_slppin_null {
90*4882a593Smuzhiyun				pins = "gpio_slp";
91*4882a593Smuzhiyun				function = "pin_fun0";
92*4882a593Smuzhiyun			};
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun			rk817_slppin_slp: rk817_slppin_slp {
95*4882a593Smuzhiyun				pins = "gpio_slp";
96*4882a593Smuzhiyun				function = "pin_fun1";
97*4882a593Smuzhiyun			};
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun			rk817_slppin_pwrdn: rk817_slppin_pwrdn {
100*4882a593Smuzhiyun				pins = "gpio_slp";
101*4882a593Smuzhiyun				function = "pin_fun2";
102*4882a593Smuzhiyun			};
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun			rk817_slppin_rst: rk817_slppin_rst {
105*4882a593Smuzhiyun				pins = "gpio_slp";
106*4882a593Smuzhiyun				function = "pin_fun3";
107*4882a593Smuzhiyun			};
108*4882a593Smuzhiyun		};
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun		regulators {
111*4882a593Smuzhiyun			vdd_logic: DCDC_REG1 {
112*4882a593Smuzhiyun				regulator-always-on;
113*4882a593Smuzhiyun				regulator-boot-on;
114*4882a593Smuzhiyun				regulator-min-microvolt = <950000>;
115*4882a593Smuzhiyun				regulator-max-microvolt = <1350000>;
116*4882a593Smuzhiyun				regulator-ramp-delay = <6001>;
117*4882a593Smuzhiyun				regulator-initial-mode = <0x1>;
118*4882a593Smuzhiyun				regulator-name = "vdd_logic";
119*4882a593Smuzhiyun				regulator-state-mem {
120*4882a593Smuzhiyun					regulator-on-in-suspend;
121*4882a593Smuzhiyun					regulator-suspend-microvolt = <950000>;
122*4882a593Smuzhiyun				};
123*4882a593Smuzhiyun			};
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun			vdd_arm: DCDC_REG2 {
126*4882a593Smuzhiyun				regulator-always-on;
127*4882a593Smuzhiyun				regulator-boot-on;
128*4882a593Smuzhiyun				regulator-min-microvolt = <950000>;
129*4882a593Smuzhiyun				regulator-max-microvolt = <1350000>;
130*4882a593Smuzhiyun				regulator-ramp-delay = <6001>;
131*4882a593Smuzhiyun				regulator-initial-mode = <0x1>;
132*4882a593Smuzhiyun				regulator-name = "vdd_arm";
133*4882a593Smuzhiyun				regulator-state-mem {
134*4882a593Smuzhiyun					regulator-off-in-suspend;
135*4882a593Smuzhiyun					regulator-suspend-microvolt = <950000>;
136*4882a593Smuzhiyun				};
137*4882a593Smuzhiyun			};
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun			vcc_ddr: DCDC_REG3 {
140*4882a593Smuzhiyun				regulator-always-on;
141*4882a593Smuzhiyun				regulator-boot-on;
142*4882a593Smuzhiyun				regulator-name = "vcc_ddr";
143*4882a593Smuzhiyun				regulator-initial-mode = <0x1>;
144*4882a593Smuzhiyun				regulator-state-mem {
145*4882a593Smuzhiyun					regulator-on-in-suspend;
146*4882a593Smuzhiyun				};
147*4882a593Smuzhiyun			};
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun			vcc_3v0: DCDC_REG4 {
150*4882a593Smuzhiyun				regulator-always-on;
151*4882a593Smuzhiyun				regulator-boot-on;
152*4882a593Smuzhiyun				regulator-min-microvolt = <3000000>;
153*4882a593Smuzhiyun				regulator-max-microvolt = <3000000>;
154*4882a593Smuzhiyun				regulator-initial-mode = <0x1>;
155*4882a593Smuzhiyun				regulator-name = "vcc_3v0";
156*4882a593Smuzhiyun				regulator-state-mem {
157*4882a593Smuzhiyun					regulator-off-in-suspend;
158*4882a593Smuzhiyun					regulator-suspend-microvolt = <3000000>;
159*4882a593Smuzhiyun				};
160*4882a593Smuzhiyun			};
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun			vcc2v5_ddr: LDO_REG1 {
163*4882a593Smuzhiyun				regulator-always-on;
164*4882a593Smuzhiyun				regulator-boot-on;
165*4882a593Smuzhiyun				regulator-min-microvolt = <2500000>;
166*4882a593Smuzhiyun				regulator-max-microvolt = <2500000>;
167*4882a593Smuzhiyun				regulator-name = "vcc2v5_ddr";
168*4882a593Smuzhiyun				regulator-state-mem {
169*4882a593Smuzhiyun					regulator-on-in-suspend;
170*4882a593Smuzhiyun					regulator-suspend-microvolt = <2500000>;
171*4882a593Smuzhiyun				};
172*4882a593Smuzhiyun			};
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun			vcc1v8_soc: LDO_REG2 {
175*4882a593Smuzhiyun				regulator-always-on;
176*4882a593Smuzhiyun				regulator-boot-on;
177*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
178*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun				regulator-name = "vcc1v8_soc";
181*4882a593Smuzhiyun				regulator-state-mem {
182*4882a593Smuzhiyun					regulator-on-in-suspend;
183*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
184*4882a593Smuzhiyun				};
185*4882a593Smuzhiyun			};
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun			vdd1v0_soc: LDO_REG3 {
188*4882a593Smuzhiyun				regulator-always-on;
189*4882a593Smuzhiyun				regulator-boot-on;
190*4882a593Smuzhiyun				regulator-min-microvolt = <1000000>;
191*4882a593Smuzhiyun				regulator-max-microvolt = <1000000>;
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun				regulator-name = "vcc1v0_soc";
194*4882a593Smuzhiyun				regulator-state-mem {
195*4882a593Smuzhiyun					regulator-on-in-suspend;
196*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
197*4882a593Smuzhiyun				};
198*4882a593Smuzhiyun			};
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun			vcc3v0_pmu: LDO_REG4 {
201*4882a593Smuzhiyun				regulator-always-on;
202*4882a593Smuzhiyun				regulator-boot-on;
203*4882a593Smuzhiyun				regulator-min-microvolt = <3000000>;
204*4882a593Smuzhiyun				regulator-max-microvolt = <3000000>;
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun				regulator-name = "vcc3v0_pmu";
207*4882a593Smuzhiyun				regulator-state-mem {
208*4882a593Smuzhiyun					regulator-on-in-suspend;
209*4882a593Smuzhiyun					regulator-suspend-microvolt = <3000000>;
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun				};
212*4882a593Smuzhiyun			};
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun			vccio_sd: LDO_REG5 {
215*4882a593Smuzhiyun				regulator-always-on;
216*4882a593Smuzhiyun				regulator-boot-on;
217*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
218*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun				regulator-name = "vccio_sd";
221*4882a593Smuzhiyun				regulator-state-mem {
222*4882a593Smuzhiyun					regulator-on-in-suspend;
223*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
224*4882a593Smuzhiyun				};
225*4882a593Smuzhiyun			};
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun			vcc_sd: LDO_REG6 {
228*4882a593Smuzhiyun				regulator-always-on;
229*4882a593Smuzhiyun				regulator-boot-on;
230*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
231*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun				regulator-name = "vcc_sd";
234*4882a593Smuzhiyun				regulator-state-mem {
235*4882a593Smuzhiyun					regulator-on-in-suspend;
236*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun				};
239*4882a593Smuzhiyun			};
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun			vcc2v8_dvp: LDO_REG7 {
242*4882a593Smuzhiyun				regulator-always-on;
243*4882a593Smuzhiyun				regulator-boot-on;
244*4882a593Smuzhiyun				regulator-min-microvolt = <2800000>;
245*4882a593Smuzhiyun				regulator-max-microvolt = <2800000>;
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun				regulator-name = "vcc2v8_dvp";
248*4882a593Smuzhiyun				regulator-state-mem {
249*4882a593Smuzhiyun					regulator-off-in-suspend;
250*4882a593Smuzhiyun					regulator-suspend-microvolt = <2800000>;
251*4882a593Smuzhiyun				};
252*4882a593Smuzhiyun			};
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun			vcc1v8_dvp: LDO_REG8 {
255*4882a593Smuzhiyun				regulator-always-on;
256*4882a593Smuzhiyun				regulator-boot-on;
257*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
258*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun				regulator-name = "vcc1v8_dvp";
261*4882a593Smuzhiyun				regulator-state-mem {
262*4882a593Smuzhiyun					regulator-on-in-suspend;
263*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
264*4882a593Smuzhiyun				};
265*4882a593Smuzhiyun			};
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun			vdd1v5_dvp: LDO_REG9 {
268*4882a593Smuzhiyun				regulator-always-on;
269*4882a593Smuzhiyun				regulator-boot-on;
270*4882a593Smuzhiyun				regulator-min-microvolt = <1500000>;
271*4882a593Smuzhiyun				regulator-max-microvolt = <1500000>;
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun				regulator-name = "vdd1v5_dvp";
274*4882a593Smuzhiyun				regulator-state-mem {
275*4882a593Smuzhiyun					regulator-off-in-suspend;
276*4882a593Smuzhiyun					regulator-suspend-microvolt = <1500000>;
277*4882a593Smuzhiyun				};
278*4882a593Smuzhiyun			};
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun			vcc3v3_sys: DCDC_REG5 {
281*4882a593Smuzhiyun				regulator-always-on;
282*4882a593Smuzhiyun				regulator-boot-on;
283*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
284*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
285*4882a593Smuzhiyun				regulator-name = "vcc3v3_sys";
286*4882a593Smuzhiyun				regulator-state-mem {
287*4882a593Smuzhiyun					regulator-on-in-suspend;
288*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
289*4882a593Smuzhiyun				};
290*4882a593Smuzhiyun			};
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun			vcc3v3_lcd: SWITCH_REG1 {
293*4882a593Smuzhiyun				regulator-boot-on;
294*4882a593Smuzhiyun				regulator-name = "vcc3v3_lcd";
295*4882a593Smuzhiyun			};
296*4882a593Smuzhiyun
297*4882a593Smuzhiyun			vcc5v0_host: SWITCH_REG2 {
298*4882a593Smuzhiyun				regulator-always-on;
299*4882a593Smuzhiyun				regulator-boot-on;
300*4882a593Smuzhiyun				regulator-name = "vcc5v0_host";
301*4882a593Smuzhiyun			};
302*4882a593Smuzhiyun		};
303*4882a593Smuzhiyun
304*4882a593Smuzhiyun		rk809_codec: codec {
305*4882a593Smuzhiyun			#sound-dai-cells = <0>;
306*4882a593Smuzhiyun			compatible = "rockchip,rk809-codec", "rockchip,rk817-codec";
307*4882a593Smuzhiyun			clocks = <&cru SCLK_I2S1_OUT>;
308*4882a593Smuzhiyun			clock-names = "mclk";
309*4882a593Smuzhiyun			pinctrl-names = "default";
310*4882a593Smuzhiyun			pinctrl-0 = <&i2s1_2ch_mclk>;
311*4882a593Smuzhiyun			hp-volume = <20>;
312*4882a593Smuzhiyun			spk-volume = <3>;
313*4882a593Smuzhiyun			status = "okay";
314*4882a593Smuzhiyun		};
315*4882a593Smuzhiyun	}