1*4882a593SmuzhiyunQualcomm PM8xxx PMIC multi-function devices 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThe PM8xxx family of Power Management ICs are used to provide regulated 4*4882a593Smuzhiyunvoltages and other various functionality to Qualcomm SoCs. 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun= PROPERTIES 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun- compatible: 9*4882a593Smuzhiyun Usage: required 10*4882a593Smuzhiyun Value type: <string> 11*4882a593Smuzhiyun Definition: must be one of: 12*4882a593Smuzhiyun "qcom,pm8058" 13*4882a593Smuzhiyun "qcom,pm8821" 14*4882a593Smuzhiyun "qcom,pm8921" 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun- #address-cells: 17*4882a593Smuzhiyun Usage: required 18*4882a593Smuzhiyun Value type: <u32> 19*4882a593Smuzhiyun Definition: must be 1 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun- #size-cells: 22*4882a593Smuzhiyun Usage: required 23*4882a593Smuzhiyun Value type: <u32> 24*4882a593Smuzhiyun Definition: must be 0 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun- interrupts: 27*4882a593Smuzhiyun Usage: required 28*4882a593Smuzhiyun Value type: <prop-encoded-array> 29*4882a593Smuzhiyun Definition: specifies the interrupt that indicates a subdevice 30*4882a593Smuzhiyun has generated an interrupt (summary interrupt). The 31*4882a593Smuzhiyun format of the specifier is defined by the binding document 32*4882a593Smuzhiyun describing the node's interrupt parent. 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun- #interrupt-cells: 35*4882a593Smuzhiyun Usage: required 36*4882a593Smuzhiyun Value type : <u32> 37*4882a593Smuzhiyun Definition: must be 2. Specifies the number of cells needed to encode 38*4882a593Smuzhiyun an interrupt source. The 1st cell contains the interrupt 39*4882a593Smuzhiyun number. The 2nd cell is the trigger type and level flags 40*4882a593Smuzhiyun encoded as follows: 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun 1 = low-to-high edge triggered 43*4882a593Smuzhiyun 2 = high-to-low edge triggered 44*4882a593Smuzhiyun 4 = active high level-sensitive 45*4882a593Smuzhiyun 8 = active low level-sensitive 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun- interrupt-controller: 48*4882a593Smuzhiyun Usage: required 49*4882a593Smuzhiyun Value type: <empty> 50*4882a593Smuzhiyun Definition: identifies this node as an interrupt controller 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun= SUBCOMPONENTS 53*4882a593Smuzhiyun 54*4882a593SmuzhiyunThe PMIC contains multiple independent functions, each described in a subnode. 55*4882a593SmuzhiyunThe below bindings specify the set of valid subnodes. 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun== Real-Time Clock 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun- compatible: 60*4882a593Smuzhiyun Usage: required 61*4882a593Smuzhiyun Value type: <string> 62*4882a593Smuzhiyun Definition: must be one of: 63*4882a593Smuzhiyun "qcom,pm8058-rtc" 64*4882a593Smuzhiyun "qcom,pm8921-rtc" 65*4882a593Smuzhiyun "qcom,pm8941-rtc" 66*4882a593Smuzhiyun "qcom,pm8018-rtc" 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun- reg: 69*4882a593Smuzhiyun Usage: required 70*4882a593Smuzhiyun Value type: <prop-encoded-array> 71*4882a593Smuzhiyun Definition: single entry specifying the base address of the RTC registers 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun- interrupts: 74*4882a593Smuzhiyun Usage: required 75*4882a593Smuzhiyun Value type: <prop-encoded-array> 76*4882a593Smuzhiyun Definition: single entry specifying the RTC's alarm interrupt 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun- allow-set-time: 79*4882a593Smuzhiyun Usage: optional 80*4882a593Smuzhiyun Value type: <empty> 81*4882a593Smuzhiyun Definition: indicates that the setting of RTC time is allowed by 82*4882a593Smuzhiyun the host CPU 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun= EXAMPLE 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun pmicintc: pmic@0 { 87*4882a593Smuzhiyun compatible = "qcom,pm8921"; 88*4882a593Smuzhiyun interrupts = <104 8>; 89*4882a593Smuzhiyun #interrupt-cells = <2>; 90*4882a593Smuzhiyun interrupt-controller; 91*4882a593Smuzhiyun #address-cells = <1>; 92*4882a593Smuzhiyun #size-cells = <0>; 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun rtc@11d { 95*4882a593Smuzhiyun compatible = "qcom,pm8921-rtc"; 96*4882a593Smuzhiyun reg = <0x11d>; 97*4882a593Smuzhiyun interrupts = <0x27 0>; 98*4882a593Smuzhiyun }; 99*4882a593Smuzhiyun }; 100