1*4882a593SmuzhiyunOMAP HS USB Host TLL (Transceiver-Less Interface) 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun- compatible : should be "ti,usbhs-tll" 6*4882a593Smuzhiyun- reg : should contain one register range i.e. start and length 7*4882a593Smuzhiyun- interrupts : should contain the TLL module's interrupt 8*4882a593Smuzhiyun- ti,hwmod : must contain "usb_tll_hs" 9*4882a593Smuzhiyun 10*4882a593SmuzhiyunOptional properties: 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun- clocks: a list of phandles and clock-specifier pairs, one for each entry in 13*4882a593Smuzhiyun clock-names. 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun- clock-names: should include: 16*4882a593Smuzhiyun * "usb_tll_hs_usb_ch0_clk" - USB TLL channel 0 clock 17*4882a593Smuzhiyun * "usb_tll_hs_usb_ch1_clk" - USB TLL channel 1 clock 18*4882a593Smuzhiyun * "usb_tll_hs_usb_ch2_clk" - USB TLL channel 2 clock 19*4882a593Smuzhiyun 20*4882a593SmuzhiyunExample: 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun usbhstll: usbhstll@4a062000 { 23*4882a593Smuzhiyun compatible = "ti,usbhs-tll"; 24*4882a593Smuzhiyun reg = <0x4a062000 0x1000>; 25*4882a593Smuzhiyun interrupts = <78>; 26*4882a593Smuzhiyun ti,hwmods = "usb_tll_hs"; 27*4882a593Smuzhiyun }; 28