1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/mfd/cirrus,madera.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Cirrus Logic Madera class audio CODECs Multi-Functional Device 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - patches@opensource.cirrus.com 11*4882a593Smuzhiyun 12*4882a593Smuzhiyundescription: | 13*4882a593Smuzhiyun These devices are audio SoCs with extensive digital capabilities and a range 14*4882a593Smuzhiyun of analogue I/O. 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun See also the child driver bindings in: 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun bindings/pinctrl/cirrus,madera.yaml 19*4882a593Smuzhiyun bindings/regulator/wlf,arizona.yaml 20*4882a593Smuzhiyun bindings/sound/cirrus,madera.yaml 21*4882a593Smuzhiyun 22*4882a593SmuzhiyunallOf: 23*4882a593Smuzhiyun - $ref: /schemas/pinctrl/cirrus,madera.yaml# 24*4882a593Smuzhiyun - $ref: /schemas/regulator/wlf,arizona.yaml# 25*4882a593Smuzhiyun - $ref: /schemas/sound/cirrus,madera.yaml# 26*4882a593Smuzhiyun - if: 27*4882a593Smuzhiyun properties: 28*4882a593Smuzhiyun compatible: 29*4882a593Smuzhiyun contains: 30*4882a593Smuzhiyun enum: 31*4882a593Smuzhiyun - cirrus,cs47l85 32*4882a593Smuzhiyun - wlf,wm1840 33*4882a593Smuzhiyun then: 34*4882a593Smuzhiyun properties: 35*4882a593Smuzhiyun SPKVDDL-supply: 36*4882a593Smuzhiyun description: 37*4882a593Smuzhiyun Left speaker driver power supply. 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun SPKVDDR-supply: 40*4882a593Smuzhiyun description: 41*4882a593Smuzhiyun Right speaker driver power supply. 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun required: 44*4882a593Smuzhiyun - SPKVDDL-supply 45*4882a593Smuzhiyun - SPKVDDR-supply 46*4882a593Smuzhiyun else: 47*4882a593Smuzhiyun required: 48*4882a593Smuzhiyun - DCVDD-supply 49*4882a593Smuzhiyun - if: 50*4882a593Smuzhiyun properties: 51*4882a593Smuzhiyun compatible: 52*4882a593Smuzhiyun contains: 53*4882a593Smuzhiyun enum: 54*4882a593Smuzhiyun - cirrus,cs47l15 55*4882a593Smuzhiyun - cirrus,cs47l35 56*4882a593Smuzhiyun then: 57*4882a593Smuzhiyun properties: 58*4882a593Smuzhiyun SPKVDD-supply: 59*4882a593Smuzhiyun description: 60*4882a593Smuzhiyun Mono speaker driver power supply. 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun required: 63*4882a593Smuzhiyun - SPKVDD-supply 64*4882a593Smuzhiyun - if: 65*4882a593Smuzhiyun properties: 66*4882a593Smuzhiyun compatible: 67*4882a593Smuzhiyun contains: 68*4882a593Smuzhiyun enum: 69*4882a593Smuzhiyun - cirrus,cs47l35 70*4882a593Smuzhiyun - cirrus,cs47l85 71*4882a593Smuzhiyun - cirrus,cs47l90 72*4882a593Smuzhiyun - cirrus,cs47l91 73*4882a593Smuzhiyun - wlf,wm1840 74*4882a593Smuzhiyun then: 75*4882a593Smuzhiyun properties: 76*4882a593Smuzhiyun DBVDD2-supply: 77*4882a593Smuzhiyun description: 78*4882a593Smuzhiyun Databus power supply. 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun required: 81*4882a593Smuzhiyun - DBVDD2-supply 82*4882a593Smuzhiyun - if: 83*4882a593Smuzhiyun properties: 84*4882a593Smuzhiyun compatible: 85*4882a593Smuzhiyun contains: 86*4882a593Smuzhiyun enum: 87*4882a593Smuzhiyun - cirrus,cs47l85 88*4882a593Smuzhiyun - cirrus,cs47l90 89*4882a593Smuzhiyun - cirrus,cs47l91 90*4882a593Smuzhiyun - wlf,wm1840 91*4882a593Smuzhiyun then: 92*4882a593Smuzhiyun properties: 93*4882a593Smuzhiyun DBVDD3-supply: 94*4882a593Smuzhiyun description: 95*4882a593Smuzhiyun Databus power supply. 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun DBVDD4-supply: 98*4882a593Smuzhiyun description: 99*4882a593Smuzhiyun Databus power supply. 100*4882a593Smuzhiyun - if: 101*4882a593Smuzhiyun properties: 102*4882a593Smuzhiyun compatible: 103*4882a593Smuzhiyun contains: 104*4882a593Smuzhiyun enum: 105*4882a593Smuzhiyun - cirrus,cs47l15 106*4882a593Smuzhiyun then: 107*4882a593Smuzhiyun required: 108*4882a593Smuzhiyun - MICVDD-supply 109*4882a593Smuzhiyun else: 110*4882a593Smuzhiyun properties: 111*4882a593Smuzhiyun CPVDD2-supply: 112*4882a593Smuzhiyun description: 113*4882a593Smuzhiyun Secondary charge pump power supply. 114*4882a593Smuzhiyun 115*4882a593Smuzhiyun required: 116*4882a593Smuzhiyun - CPVDD2-supply 117*4882a593Smuzhiyun 118*4882a593Smuzhiyunproperties: 119*4882a593Smuzhiyun compatible: 120*4882a593Smuzhiyun enum: 121*4882a593Smuzhiyun - cirrus,cs47l15 122*4882a593Smuzhiyun - cirrus,cs47l35 123*4882a593Smuzhiyun - cirrus,cs47l85 124*4882a593Smuzhiyun - cirrus,cs47l90 125*4882a593Smuzhiyun - cirrus,cs47l91 126*4882a593Smuzhiyun - cirrus,cs42l92 127*4882a593Smuzhiyun - cirrus,cs47l92 128*4882a593Smuzhiyun - cirrus,cs47l93 129*4882a593Smuzhiyun - cirrus,wm1840 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun reg: 132*4882a593Smuzhiyun maxItems: 1 133*4882a593Smuzhiyun 134*4882a593Smuzhiyun gpio-controller: true 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun '#gpio-cells': 137*4882a593Smuzhiyun description: 138*4882a593Smuzhiyun The first cell is the pin number. The second cell is reserved for 139*4882a593Smuzhiyun future use and must be zero 140*4882a593Smuzhiyun const: 2 141*4882a593Smuzhiyun 142*4882a593Smuzhiyun interrupt-controller: true 143*4882a593Smuzhiyun 144*4882a593Smuzhiyun '#interrupt-cells': 145*4882a593Smuzhiyun description: 146*4882a593Smuzhiyun The first cell is the IRQ number. 147*4882a593Smuzhiyun The second cell is the flags, encoded as the trigger masks from 148*4882a593Smuzhiyun bindings/interrupt-controller/interrupts.txt 149*4882a593Smuzhiyun const: 2 150*4882a593Smuzhiyun 151*4882a593Smuzhiyun interrupts: 152*4882a593Smuzhiyun maxItems: 1 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun reset-gpios: 155*4882a593Smuzhiyun description: 156*4882a593Smuzhiyun One entry specifying the GPIO controlling /RESET. As defined in 157*4882a593Smuzhiyun bindings/gpio.txt. Although optional, it is strongly recommended 158*4882a593Smuzhiyun to use a hardware reset. 159*4882a593Smuzhiyun maxItems: 1 160*4882a593Smuzhiyun 161*4882a593Smuzhiyun clocks: 162*4882a593Smuzhiyun description: 163*4882a593Smuzhiyun Should reference the clocks supplied on MCLK1, MCLK2 and MCLK3. 164*4882a593Smuzhiyun minItems: 1 165*4882a593Smuzhiyun maxItems: 3 166*4882a593Smuzhiyun 167*4882a593Smuzhiyun clock-names: 168*4882a593Smuzhiyun description: | 169*4882a593Smuzhiyun May contain up to three strings: 170*4882a593Smuzhiyun "mclk1" For the clock supplied on MCLK1, recommended to be a 171*4882a593Smuzhiyun high quality audio reference clock. 172*4882a593Smuzhiyun "mclk2" For the clock supplied on MCLK2, required to be an 173*4882a593Smuzhiyun always on 32k clock. 174*4882a593Smuzhiyun "mclk3" For the clock supplied on MCLK3. 175*4882a593Smuzhiyun oneOf: 176*4882a593Smuzhiyun - items: 177*4882a593Smuzhiyun - const: mclk1 178*4882a593Smuzhiyun - items: 179*4882a593Smuzhiyun - const: mclk2 180*4882a593Smuzhiyun - items: 181*4882a593Smuzhiyun - const: mclk3 182*4882a593Smuzhiyun - items: 183*4882a593Smuzhiyun - const: mclk1 184*4882a593Smuzhiyun - const: mclk2 185*4882a593Smuzhiyun - items: 186*4882a593Smuzhiyun - const: mclk1 187*4882a593Smuzhiyun - const: mclk3 188*4882a593Smuzhiyun - items: 189*4882a593Smuzhiyun - const: mclk2 190*4882a593Smuzhiyun - const: mclk3 191*4882a593Smuzhiyun - items: 192*4882a593Smuzhiyun - const: mclk1 193*4882a593Smuzhiyun - const: mclk2 194*4882a593Smuzhiyun - const: mclk3 195*4882a593Smuzhiyun 196*4882a593Smuzhiyun AVDD-supply: 197*4882a593Smuzhiyun description: 198*4882a593Smuzhiyun Analogue power supply. 199*4882a593Smuzhiyun 200*4882a593Smuzhiyun DBVDD1-supply: 201*4882a593Smuzhiyun description: 202*4882a593Smuzhiyun Databus power supply. 203*4882a593Smuzhiyun 204*4882a593Smuzhiyun CPVDD1-supply: 205*4882a593Smuzhiyun description: 206*4882a593Smuzhiyun Charge pump power supply. 207*4882a593Smuzhiyun 208*4882a593Smuzhiyun DCVDD-supply: 209*4882a593Smuzhiyun description: 210*4882a593Smuzhiyun Digital power supply, optional on CS47L85, WM1840 where it can 211*4882a593Smuzhiyun be supplied internally. 212*4882a593Smuzhiyun 213*4882a593Smuzhiyun MICVDD-supply: 214*4882a593Smuzhiyun description: 215*4882a593Smuzhiyun Microphone power supply, normally supplied internally except on 216*4882a593Smuzhiyun cs47l24, wm1831 where it is mandatory. 217*4882a593Smuzhiyun 218*4882a593Smuzhiyunrequired: 219*4882a593Smuzhiyun - compatible 220*4882a593Smuzhiyun - gpio-controller 221*4882a593Smuzhiyun - '#gpio-cells' 222*4882a593Smuzhiyun - interrupt-controller 223*4882a593Smuzhiyun - '#interrupt-cells' 224*4882a593Smuzhiyun - interrupt-parent 225*4882a593Smuzhiyun - interrupts 226*4882a593Smuzhiyun - AVDD-supply 227*4882a593Smuzhiyun - DBVDD1-supply 228*4882a593Smuzhiyun - CPVDD1-supply 229*4882a593Smuzhiyun 230*4882a593SmuzhiyununevaluatedProperties: false 231*4882a593Smuzhiyun 232*4882a593Smuzhiyunexamples: 233*4882a593Smuzhiyun - | 234*4882a593Smuzhiyun #include <dt-bindings/sound/madera.h> 235*4882a593Smuzhiyun i2c@e0004000 { 236*4882a593Smuzhiyun #address-cells = <1>; 237*4882a593Smuzhiyun #size-cells = <0>; 238*4882a593Smuzhiyun reg = <0xe0004000 0x1000>; 239*4882a593Smuzhiyun 240*4882a593Smuzhiyun cs47l85: codec@1a { 241*4882a593Smuzhiyun compatible = "cirrus,cs47l85"; 242*4882a593Smuzhiyun reg = <0x1a>; 243*4882a593Smuzhiyun 244*4882a593Smuzhiyun reset-gpios = <&gpio 0>; 245*4882a593Smuzhiyun wlf,ldoena = <&gpio 1>; 246*4882a593Smuzhiyun 247*4882a593Smuzhiyun interrupt-controller; 248*4882a593Smuzhiyun #interrupt-cells = <2>; 249*4882a593Smuzhiyun interrupts = <&host_irq1>; 250*4882a593Smuzhiyun interrupt-parent = <&gic>; 251*4882a593Smuzhiyun 252*4882a593Smuzhiyun gpio-controller; 253*4882a593Smuzhiyun #gpio-cells = <2>; 254*4882a593Smuzhiyun 255*4882a593Smuzhiyun AVDD-supply = <&vdd1v8>; 256*4882a593Smuzhiyun DBVDD1-supply = <&vdd1v8>; 257*4882a593Smuzhiyun DBVDD2-supply = <&vdd1v8>; 258*4882a593Smuzhiyun DBVDD3-supply = <&vdd1v8>; 259*4882a593Smuzhiyun DBVDD4-supply = <&vdd1v8>; 260*4882a593Smuzhiyun CPVDD1-supply = <&vdd1v8>; 261*4882a593Smuzhiyun CPVDD2-supply = <&vdd1v2>; 262*4882a593Smuzhiyun SPKVDDL-supply = <&vdd5v>; 263*4882a593Smuzhiyun SPKVDDR-supply = <&vdd5v>; 264*4882a593Smuzhiyun 265*4882a593Smuzhiyun clocks = <&clks 0>, <&clks 1>, <&clks 2>; 266*4882a593Smuzhiyun clock-names = "mclk1", "mclk2", "mclk3"; 267*4882a593Smuzhiyun 268*4882a593Smuzhiyun cirrus,dmic-ref = <0 0 MADERA_DMIC_REF_MICBIAS1>; 269*4882a593Smuzhiyun cirrus,inmode = < 270*4882a593Smuzhiyun MADERA_INMODE_SE MADERA_INMODE_SE 271*4882a593Smuzhiyun MADERA_INMODE_SE MADERA_INMODE_SE 272*4882a593Smuzhiyun MADERA_INMODE_DIFF MADERA_INMODE_DIFF 273*4882a593Smuzhiyun >; 274*4882a593Smuzhiyun cirrus,max-channels-clocked = <2 0 0>; 275*4882a593Smuzhiyun 276*4882a593Smuzhiyun pinctrl-names = "default"; 277*4882a593Smuzhiyun pinctrl-0 = <&pinsettings>; 278*4882a593Smuzhiyun 279*4882a593Smuzhiyun pinsettings: pin-settings { 280*4882a593Smuzhiyun aif1-pins { 281*4882a593Smuzhiyun groups = "aif1"; 282*4882a593Smuzhiyun function = "aif1"; 283*4882a593Smuzhiyun bias-bus-hold; 284*4882a593Smuzhiyun }; 285*4882a593Smuzhiyun 286*4882a593Smuzhiyun aif2-pins { 287*4882a593Smuzhiyun groups = "aif2"; 288*4882a593Smuzhiyun function = "aif2"; 289*4882a593Smuzhiyun bias-bus-hold; 290*4882a593Smuzhiyun }; 291*4882a593Smuzhiyun 292*4882a593Smuzhiyun aif3-pins { 293*4882a593Smuzhiyun groups = "aif3"; 294*4882a593Smuzhiyun function = "aif3"; 295*4882a593Smuzhiyun bias-bus-hold; 296*4882a593Smuzhiyun }; 297*4882a593Smuzhiyun }; 298*4882a593Smuzhiyun }; 299*4882a593Smuzhiyun }; 300