1*4882a593Smuzhiyun* Device tree bindings for Atmel Flexcom (Flexible Serial Communication Unit) 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThe Atmel Flexcom is just a wrapper which embeds a SPI controller, an I2C 4*4882a593Smuzhiyuncontroller and an USART. Only one function can be used at a time and is chosen 5*4882a593Smuzhiyunat boot time according to the device tree. 6*4882a593Smuzhiyun 7*4882a593SmuzhiyunRequired properties: 8*4882a593Smuzhiyun- compatible: Should be "atmel,sama5d2-flexcom" 9*4882a593Smuzhiyun- reg: Should be the offset/length value for Flexcom dedicated 10*4882a593Smuzhiyun I/O registers (without USART, TWI or SPI registers). 11*4882a593Smuzhiyun- clocks: Should be the Flexcom peripheral clock from PMC. 12*4882a593Smuzhiyun- #address-cells: Should be <1> 13*4882a593Smuzhiyun- #size-cells: Should be <1> 14*4882a593Smuzhiyun- ranges: Should be one range for the full I/O register region 15*4882a593Smuzhiyun (including USART, TWI and SPI registers). 16*4882a593Smuzhiyun- atmel,flexcom-mode: Should be one of the following values: 17*4882a593Smuzhiyun - <1> for USART 18*4882a593Smuzhiyun - <2> for SPI 19*4882a593Smuzhiyun - <3> for I2C 20*4882a593Smuzhiyun 21*4882a593SmuzhiyunRequired child: 22*4882a593SmuzhiyunA single available child device of type matching the "atmel,flexcom-mode" 23*4882a593Smuzhiyunproperty. 24*4882a593Smuzhiyun 25*4882a593SmuzhiyunThe phandle provided by the clocks property of the child is the same as one for 26*4882a593Smuzhiyunthe Flexcom parent. 27*4882a593Smuzhiyun 28*4882a593SmuzhiyunFor other properties, please refer to the documentations of the respective 29*4882a593Smuzhiyundevice: 30*4882a593Smuzhiyun- ../serial/atmel-usart.txt 31*4882a593Smuzhiyun- ../spi/spi_atmel.txt 32*4882a593Smuzhiyun- ../i2c/i2c-at91.txt 33*4882a593Smuzhiyun 34*4882a593SmuzhiyunExample: 35*4882a593Smuzhiyun 36*4882a593Smuzhiyunflexcom@f8034000 { 37*4882a593Smuzhiyun compatible = "atmel,sama5d2-flexcom"; 38*4882a593Smuzhiyun reg = <0xf8034000 0x200>; 39*4882a593Smuzhiyun clocks = <&flx0_clk>; 40*4882a593Smuzhiyun #address-cells = <1>; 41*4882a593Smuzhiyun #size-cells = <1>; 42*4882a593Smuzhiyun ranges = <0x0 0xf8034000 0x800>; 43*4882a593Smuzhiyun atmel,flexcom-mode = <2>; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun spi@400 { 46*4882a593Smuzhiyun compatible = "atmel,at91rm9200-spi"; 47*4882a593Smuzhiyun reg = <0x400 0x200>; 48*4882a593Smuzhiyun interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>; 49*4882a593Smuzhiyun pinctrl-names = "default"; 50*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_flx0_default>; 51*4882a593Smuzhiyun #address-cells = <1>; 52*4882a593Smuzhiyun #size-cells = <0>; 53*4882a593Smuzhiyun clocks = <&flx0_clk>; 54*4882a593Smuzhiyun clock-names = "spi_clk"; 55*4882a593Smuzhiyun atmel,fifo-size = <32>; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun mtd_dataflash@0 { 58*4882a593Smuzhiyun compatible = "atmel,at25f512b"; 59*4882a593Smuzhiyun reg = <0>; 60*4882a593Smuzhiyun spi-max-frequency = <20000000>; 61*4882a593Smuzhiyun }; 62*4882a593Smuzhiyun }; 63*4882a593Smuzhiyun}; 64