xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/memory-controllers/ti/emif.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun* EMIF family of TI SDRAM controllers
2*4882a593Smuzhiyun
3*4882a593SmuzhiyunEMIF - External Memory Interface - is an SDRAM controller used in
4*4882a593SmuzhiyunTI SoCs. EMIF supports, based on the IP revision, one or more of
5*4882a593SmuzhiyunDDR2/DDR3/LPDDR2 protocols. This binding describes a given instance
6*4882a593Smuzhiyunof the EMIF IP and memory parts attached to it. Certain revisions
7*4882a593Smuzhiyunof the EMIF controller also contain optional ECC support, which
8*4882a593Smuzhiyuncorrects one bit errors and detects two bit errors.
9*4882a593Smuzhiyun
10*4882a593SmuzhiyunRequired properties:
11*4882a593Smuzhiyun- compatible	: Should be of the form "ti,emif-<ip-rev>" where <ip-rev>
12*4882a593Smuzhiyun  is the IP revision of the specific EMIF instance. For newer controllers,
13*4882a593Smuzhiyun  compatible should be one of the following:
14*4882a593Smuzhiyun  	     "ti,emif-am3352"
15*4882a593Smuzhiyun	     "ti,emif-am4372"
16*4882a593Smuzhiyun	     "ti,emif-dra7xx"
17*4882a593Smuzhiyun	     "ti,emif-keystone"
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun- phy-type	: <u32> indicating the DDR phy type. Following are the
20*4882a593Smuzhiyun  allowed values
21*4882a593Smuzhiyun  <1>	: Attila PHY
22*4882a593Smuzhiyun  <2>	: Intelli PHY
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun- device-handle	: phandle to a "lpddr2" node representing the memory part
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun- ti,hwmods	: For TI hwmods processing and omap device creation
27*4882a593Smuzhiyun  the value shall be "emif<n>" where <n> is the number of the EMIF
28*4882a593Smuzhiyun  instance with base 1.
29*4882a593Smuzhiyun- interrupts	: interrupt used by the controller
30*4882a593Smuzhiyun
31*4882a593SmuzhiyunRequired only for "ti,emif-am3352" and "ti,emif-am4372":
32*4882a593Smuzhiyun- sram			: Phandles for generic sram driver nodes,
33*4882a593Smuzhiyun  first should be type 'protect-exec' for the driver to use to copy
34*4882a593Smuzhiyun  and run PM functions, second should be regular pool to be used for
35*4882a593Smuzhiyun  data region for code. See Documentation/devicetree/bindings/sram/sram.yaml
36*4882a593Smuzhiyun  for more details.
37*4882a593Smuzhiyun
38*4882a593SmuzhiyunOptional properties:
39*4882a593Smuzhiyun- cs1-used		: Have this property if CS1 of this EMIF
40*4882a593Smuzhiyun  instance has a memory part attached to it. If there is a memory
41*4882a593Smuzhiyun  part attached to CS1, it should be the same type as the one on CS0,
42*4882a593Smuzhiyun  so there is no need to give the details of this memory part.
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun- cal-resistor-per-cs	: Have this property if the board has one
45*4882a593Smuzhiyun  calibration resistor per chip-select.
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun- hw-caps-read-idle-ctrl: Have this property if the controller
48*4882a593Smuzhiyun  supports read idle window programming
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun- hw-caps-dll-calib-ctrl: Have this property if the controller
51*4882a593Smuzhiyun  supports dll calibration control
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun- hw-caps-ll-interface	: Have this property if the controller
54*4882a593Smuzhiyun  has a low latency interface and corresponding interrupt events
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun- hw-caps-temp-alert	: Have this property if the controller
57*4882a593Smuzhiyun  has capability for generating SDRAM temperature alerts
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun-Examples:
60*4882a593Smuzhiyun
61*4882a593Smuzhiyunemif1: emif@4c000000 {
62*4882a593Smuzhiyun	compatible	= "ti,emif-4d";
63*4882a593Smuzhiyun	ti,hwmods	= "emif2";
64*4882a593Smuzhiyun	phy-type	= <1>;
65*4882a593Smuzhiyun	device-handle	= <&elpida_ECB240ABACN>;
66*4882a593Smuzhiyun	cs1-used;
67*4882a593Smuzhiyun	hw-caps-read-idle-ctrl;
68*4882a593Smuzhiyun	hw-caps-ll-interface;
69*4882a593Smuzhiyun	hw-caps-temp-alert;
70*4882a593Smuzhiyun};
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun/* From am33xx.dtsi */
73*4882a593Smuzhiyunemif: emif@4c000000 {
74*4882a593Smuzhiyun        compatible = "ti,emif-am3352";
75*4882a593Smuzhiyun        reg =   <0x4C000000 0x1000>;
76*4882a593Smuzhiyun        sram = <&pm_sram_code
77*4882a593Smuzhiyun                &pm_sram_data>;
78*4882a593Smuzhiyun};
79*4882a593Smuzhiyun
80*4882a593Smuzhiyunemif1: emif@4c000000 {
81*4882a593Smuzhiyun	compatible = "ti,emif-dra7xx";
82*4882a593Smuzhiyun	reg = <0x4c000000 0x200>;
83*4882a593Smuzhiyun	interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
84*4882a593Smuzhiyun};
85