1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: "http://devicetree.org/schemas/memory-controllers/renesas,dbsc.yaml#" 5*4882a593Smuzhiyun$schema: "http://devicetree.org/meta-schemas/core.yaml#" 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Renesas DDR Bus Controllers 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Geert Uytterhoeven <geert+renesas@glider.be> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyundescription: | 13*4882a593Smuzhiyun Renesas SoCs contain one or more memory controllers. These memory 14*4882a593Smuzhiyun controllers differ from one SoC variant to another, and are called by 15*4882a593Smuzhiyun different names, e.g. "DDR Bus Controller (DBSC)", "DDR3 Bus State Controller 16*4882a593Smuzhiyun (DBSC3)", or "SDRAM Bus State Controller (SBSC)"). 17*4882a593Smuzhiyun 18*4882a593Smuzhiyunproperties: 19*4882a593Smuzhiyun compatible: 20*4882a593Smuzhiyun enum: 21*4882a593Smuzhiyun - renesas,dbsc-r8a73a4 # R-Mobile APE6 22*4882a593Smuzhiyun - renesas,dbsc3-r8a7740 # R-Mobile A1 23*4882a593Smuzhiyun - renesas,sbsc-sh73a0 # SH-Mobile AG5 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun reg: 26*4882a593Smuzhiyun maxItems: 1 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun interrupts: 29*4882a593Smuzhiyun maxItems: 2 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun interrupt-names: 32*4882a593Smuzhiyun items: 33*4882a593Smuzhiyun - const: sec # secure interrupt 34*4882a593Smuzhiyun - const: temp # normal (temperature) interrupt 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun power-domains: 37*4882a593Smuzhiyun maxItems: 1 38*4882a593Smuzhiyun 39*4882a593Smuzhiyunrequired: 40*4882a593Smuzhiyun - compatible 41*4882a593Smuzhiyun - reg 42*4882a593Smuzhiyun - power-domains 43*4882a593Smuzhiyun 44*4882a593SmuzhiyunadditionalProperties: false 45*4882a593Smuzhiyun 46*4882a593Smuzhiyunexamples: 47*4882a593Smuzhiyun - | 48*4882a593Smuzhiyun #include <dt-bindings/interrupt-controller/arm-gic.h> 49*4882a593Smuzhiyun sbsc1: memory-controller@fe400000 { 50*4882a593Smuzhiyun compatible = "renesas,sbsc-sh73a0"; 51*4882a593Smuzhiyun reg = <0xfe400000 0x400>; 52*4882a593Smuzhiyun interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, 53*4882a593Smuzhiyun <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 54*4882a593Smuzhiyun interrupt-names = "sec", "temp"; 55*4882a593Smuzhiyun power-domains = <&pd_a4bc0>; 56*4882a593Smuzhiyun }; 57