1*4882a593SmuzhiyunDevice tree bindings for ARM PL353 static memory controller 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunPL353 static memory controller supports two kinds of memory 4*4882a593Smuzhiyuninterfaces.i.e NAND and SRAM/NOR interfaces. 5*4882a593SmuzhiyunThe actual devices are instantiated from the child nodes of pl353 smc node. 6*4882a593Smuzhiyun 7*4882a593SmuzhiyunRequired properties: 8*4882a593Smuzhiyun- compatible : Should be "arm,pl353-smc-r2p1", "arm,primecell". 9*4882a593Smuzhiyun- reg : Controller registers map and length. 10*4882a593Smuzhiyun- clock-names : List of input clock names - "memclk", "apb_pclk" 11*4882a593Smuzhiyun (See clock bindings for details). 12*4882a593Smuzhiyun- clocks : Clock phandles (see clock bindings for details). 13*4882a593Smuzhiyun- address-cells : Must be 2. 14*4882a593Smuzhiyun- size-cells : Must be 1. 15*4882a593Smuzhiyun 16*4882a593SmuzhiyunChild nodes: 17*4882a593Smuzhiyun For NAND the "arm,pl353-nand-r2p1" and for NOR the "cfi-flash" drivers are 18*4882a593Smuzhiyunsupported as child nodes. 19*4882a593Smuzhiyun 20*4882a593Smuzhiyunfor NAND partition information please refer the below file 21*4882a593SmuzhiyunDocumentation/devicetree/bindings/mtd/partition.txt 22*4882a593Smuzhiyun 23*4882a593SmuzhiyunExample: 24*4882a593Smuzhiyun smcc: memory-controller@e000e000 25*4882a593Smuzhiyun compatible = "arm,pl353-smc-r2p1", "arm,primecell"; 26*4882a593Smuzhiyun clock-names = "memclk", "apb_pclk"; 27*4882a593Smuzhiyun clocks = <&clkc 11>, <&clkc 44>; 28*4882a593Smuzhiyun reg = <0xe000e000 0x1000>; 29*4882a593Smuzhiyun #address-cells = <2>; 30*4882a593Smuzhiyun #size-cells = <1>; 31*4882a593Smuzhiyun ranges = <0x0 0x0 0xe1000000 0x1000000 //Nand CS Region 32*4882a593Smuzhiyun 0x1 0x0 0xe2000000 0x2000000 //SRAM/NOR CS Region 33*4882a593Smuzhiyun 0x2 0x0 0xe4000000 0x2000000>; //SRAM/NOR CS Region 34*4882a593Smuzhiyun nand_0: flash@e1000000 { 35*4882a593Smuzhiyun compatible = "arm,pl353-nand-r2p1" 36*4882a593Smuzhiyun reg = <0 0 0x1000000>; 37*4882a593Smuzhiyun (...) 38*4882a593Smuzhiyun }; 39*4882a593Smuzhiyun nor0: flash@e2000000 { 40*4882a593Smuzhiyun compatible = "cfi-flash"; 41*4882a593Smuzhiyun reg = <1 0 0x2000000>; 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun nor1: flash@e4000000 { 44*4882a593Smuzhiyun compatible = "cfi-flash"; 45*4882a593Smuzhiyun reg = <2 0 0x2000000>; 46*4882a593Smuzhiyun }; 47*4882a593Smuzhiyun }; 48