1*4882a593Smuzhiyun* Device tree bindings for Atmel EBI 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThe External Bus Interface (EBI) controller is a bus where you can connect 4*4882a593Smuzhiyunasynchronous (NAND, NOR, SRAM, ....) and synchronous memories (SDR/DDR SDRAMs). 5*4882a593SmuzhiyunThe EBI provides a glue-less interface to asynchronous memories through the SMC 6*4882a593Smuzhiyun(Static Memory Controller). 7*4882a593Smuzhiyun 8*4882a593SmuzhiyunRequired properties: 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun- compatible: "atmel,at91sam9260-ebi" 11*4882a593Smuzhiyun "atmel,at91sam9261-ebi" 12*4882a593Smuzhiyun "atmel,at91sam9263-ebi0" 13*4882a593Smuzhiyun "atmel,at91sam9263-ebi1" 14*4882a593Smuzhiyun "atmel,at91sam9rl-ebi" 15*4882a593Smuzhiyun "atmel,at91sam9g45-ebi" 16*4882a593Smuzhiyun "atmel,at91sam9x5-ebi" 17*4882a593Smuzhiyun "atmel,sama5d3-ebi" 18*4882a593Smuzhiyun "microchip,sam9x60-ebi" 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun- reg: Contains offset/length value for EBI memory mapping. 21*4882a593Smuzhiyun This property might contain several entries if the EBI 22*4882a593Smuzhiyun memory range is not contiguous 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun- #address-cells: Must be 2. 25*4882a593Smuzhiyun The first cell encodes the CS. 26*4882a593Smuzhiyun The second cell encode the offset into the CS memory 27*4882a593Smuzhiyun range. 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun- #size-cells: Must be set to 1. 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun- ranges: Encodes CS to memory region association. 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun- clocks: Clock feeding the EBI controller. 34*4882a593Smuzhiyun See clock-bindings.txt 35*4882a593Smuzhiyun 36*4882a593SmuzhiyunChildren device nodes are representing device connected to the EBI bus. 37*4882a593Smuzhiyun 38*4882a593SmuzhiyunRequired device node properties: 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun- reg: Contains the chip-select id, the offset and the length 41*4882a593Smuzhiyun of the memory region requested by the device. 42*4882a593Smuzhiyun 43*4882a593SmuzhiyunEBI bus configuration will be defined directly in the device subnode. 44*4882a593Smuzhiyun 45*4882a593SmuzhiyunOptional EBI/SMC properties: 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun- atmel,smc-bus-width: width of the asynchronous device's data bus 48*4882a593Smuzhiyun 8, 16 or 32. 49*4882a593Smuzhiyun Default to 8 when undefined. 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun- atmel,smc-byte-access-type "write" or "select" (see Atmel datasheet). 52*4882a593Smuzhiyun Default to "select" when undefined. 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun- atmel,smc-read-mode "nrd" or "ncs". 55*4882a593Smuzhiyun Default to "ncs" when undefined. 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun- atmel,smc-write-mode "nwe" or "ncs". 58*4882a593Smuzhiyun Default to "ncs" when undefined. 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun- atmel,smc-exnw-mode "disabled", "frozen" or "ready". 61*4882a593Smuzhiyun Default to "disabled" when undefined. 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun- atmel,smc-page-mode enable page mode if present. The provided value 64*4882a593Smuzhiyun defines the page size (supported values: 4, 8, 65*4882a593Smuzhiyun 16 and 32). 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun- atmel,smc-tdf-mode: "normal" or "optimized". When set to 68*4882a593Smuzhiyun "optimized" the data float time is optimized 69*4882a593Smuzhiyun depending on the next device being accessed 70*4882a593Smuzhiyun (next device setup time is subtracted to the 71*4882a593Smuzhiyun current device data float time). 72*4882a593Smuzhiyun Default to "normal" when undefined. 73*4882a593Smuzhiyun 74*4882a593SmuzhiyunIf at least one atmel,smc- property is defined the following SMC timing 75*4882a593Smuzhiyunproperties become mandatory. In the other hand, if none of the atmel,smc- 76*4882a593Smuzhiyunproperties are specified, we assume that the EBI bus configuration will be 77*4882a593Smuzhiyunhandled by the sub-device driver, and none of those properties should be 78*4882a593Smuzhiyundefined. 79*4882a593Smuzhiyun 80*4882a593SmuzhiyunAll the timings are expressed in nanoseconds (see Atmel datasheet for a full 81*4882a593Smuzhiyundescription). 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun- atmel,smc-ncs-rd-setup-ns 84*4882a593Smuzhiyun- atmel,smc-nrd-setup-ns 85*4882a593Smuzhiyun- atmel,smc-ncs-wr-setup-ns 86*4882a593Smuzhiyun- atmel,smc-nwe-setup-ns 87*4882a593Smuzhiyun- atmel,smc-ncs-rd-pulse-ns 88*4882a593Smuzhiyun- atmel,smc-nrd-pulse-ns 89*4882a593Smuzhiyun- atmel,smc-ncs-wr-pulse-ns 90*4882a593Smuzhiyun- atmel,smc-nwe-pulse-ns 91*4882a593Smuzhiyun- atmel,smc-nwe-cycle-ns 92*4882a593Smuzhiyun- atmel,smc-nrd-cycle-ns 93*4882a593Smuzhiyun- atmel,smc-tdf-ns 94*4882a593Smuzhiyun 95*4882a593SmuzhiyunExample: 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun ebi: ebi@10000000 { 98*4882a593Smuzhiyun compatible = "atmel,sama5d3-ebi"; 99*4882a593Smuzhiyun #address-cells = <2>; 100*4882a593Smuzhiyun #size-cells = <1>; 101*4882a593Smuzhiyun atmel,smc = <&hsmc>; 102*4882a593Smuzhiyun atmel,matrix = <&matrix>; 103*4882a593Smuzhiyun reg = <0x10000000 0x10000000 104*4882a593Smuzhiyun 0x40000000 0x30000000>; 105*4882a593Smuzhiyun ranges = <0x0 0x0 0x10000000 0x10000000 106*4882a593Smuzhiyun 0x1 0x0 0x40000000 0x10000000 107*4882a593Smuzhiyun 0x2 0x0 0x50000000 0x10000000 108*4882a593Smuzhiyun 0x3 0x0 0x60000000 0x10000000>; 109*4882a593Smuzhiyun clocks = <&mck>; 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun pinctrl-names = "default"; 112*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_ebi_addr>; 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun nor: flash@0,0 { 115*4882a593Smuzhiyun compatible = "cfi-flash"; 116*4882a593Smuzhiyun #address-cells = <1>; 117*4882a593Smuzhiyun #size-cells = <1>; 118*4882a593Smuzhiyun reg = <0x0 0x0 0x1000000>; 119*4882a593Smuzhiyun bank-width = <2>; 120*4882a593Smuzhiyun 121*4882a593Smuzhiyun atmel,smc-read-mode = "nrd"; 122*4882a593Smuzhiyun atmel,smc-write-mode = "nwe"; 123*4882a593Smuzhiyun atmel,smc-bus-width = <16>; 124*4882a593Smuzhiyun atmel,smc-ncs-rd-setup-ns = <0>; 125*4882a593Smuzhiyun atmel,smc-ncs-wr-setup-ns = <0>; 126*4882a593Smuzhiyun atmel,smc-nwe-setup-ns = <8>; 127*4882a593Smuzhiyun atmel,smc-nrd-setup-ns = <16>; 128*4882a593Smuzhiyun atmel,smc-ncs-rd-pulse-ns = <84>; 129*4882a593Smuzhiyun atmel,smc-ncs-wr-pulse-ns = <84>; 130*4882a593Smuzhiyun atmel,smc-nrd-pulse-ns = <76>; 131*4882a593Smuzhiyun atmel,smc-nwe-pulse-ns = <76>; 132*4882a593Smuzhiyun atmel,smc-nrd-cycle-ns = <107>; 133*4882a593Smuzhiyun atmel,smc-nwe-cycle-ns = <84>; 134*4882a593Smuzhiyun atmel,smc-tdf-ns = <16>; 135*4882a593Smuzhiyun }; 136*4882a593Smuzhiyun }; 137*4882a593Smuzhiyun 138