1*4882a593SmuzhiyunXilinx Video IP Pipeline (VIPP) 2*4882a593Smuzhiyun------------------------------- 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunGeneral concept 5*4882a593Smuzhiyun--------------- 6*4882a593Smuzhiyun 7*4882a593SmuzhiyunXilinx video IP pipeline processes video streams through one or more Xilinx 8*4882a593Smuzhiyunvideo IP cores. Each video IP core is represented as documented in video.txt 9*4882a593Smuzhiyunand IP core specific documentation, xlnx,v-*.txt, in this directory. The DT 10*4882a593Smuzhiyunnode of the VIPP represents as a top level node of the pipeline and defines 11*4882a593Smuzhiyunmappings between DMAs and the video IP cores. 12*4882a593Smuzhiyun 13*4882a593SmuzhiyunRequired properties: 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun- compatible: Must be "xlnx,video". 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun- dmas, dma-names: List of one DMA specifier and identifier string (as defined 18*4882a593Smuzhiyun in Documentation/devicetree/bindings/dma/dma.txt) per port. Each port 19*4882a593Smuzhiyun requires a DMA channel with the identifier string set to "port" followed by 20*4882a593Smuzhiyun the port index. 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun- ports: Video port, using the DT bindings defined in ../video-interfaces.txt. 23*4882a593Smuzhiyun 24*4882a593SmuzhiyunRequired port properties: 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun- direction: should be either "input" or "output" depending on the direction 27*4882a593Smuzhiyun of stream. 28*4882a593Smuzhiyun 29*4882a593SmuzhiyunExample: 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun video_cap { 32*4882a593Smuzhiyun compatible = "xlnx,video"; 33*4882a593Smuzhiyun dmas = <&vdma_1 1>, <&vdma_3 1>; 34*4882a593Smuzhiyun dma-names = "port0", "port1"; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun ports { 37*4882a593Smuzhiyun #address-cells = <1>; 38*4882a593Smuzhiyun #size-cells = <0>; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun port@0 { 41*4882a593Smuzhiyun reg = <0>; 42*4882a593Smuzhiyun direction = "input"; 43*4882a593Smuzhiyun vcap0_in0: endpoint { 44*4882a593Smuzhiyun remote-endpoint = <&scaler0_out>; 45*4882a593Smuzhiyun }; 46*4882a593Smuzhiyun }; 47*4882a593Smuzhiyun port@1 { 48*4882a593Smuzhiyun reg = <1>; 49*4882a593Smuzhiyun direction = "input"; 50*4882a593Smuzhiyun vcap0_in1: endpoint { 51*4882a593Smuzhiyun remote-endpoint = <&switch_out1>; 52*4882a593Smuzhiyun }; 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun }; 55*4882a593Smuzhiyun }; 56