1*4882a593SmuzhiyunSTMicroelectronics STIH4xx HDMI CEC driver 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun - compatible : value should be "st,stih-cec" 5*4882a593Smuzhiyun - reg : Physical base address of the IP registers and length of memory 6*4882a593Smuzhiyun mapped region. 7*4882a593Smuzhiyun - clocks : from common clock binding: handle to HDMI CEC clock 8*4882a593Smuzhiyun - interrupts : HDMI CEC interrupt number to the CPU. 9*4882a593Smuzhiyun - pinctrl-names: Contains only one value - "default" 10*4882a593Smuzhiyun - pinctrl-0: Specifies the pin control groups used for CEC hardware. 11*4882a593Smuzhiyun - resets: Reference to a reset controller 12*4882a593Smuzhiyun - hdmi-phandle: Phandle to the HDMI controller, see also cec.txt. 13*4882a593Smuzhiyun 14*4882a593SmuzhiyunExample for STIH407: 15*4882a593Smuzhiyun 16*4882a593Smuzhiyunsti-cec@94a087c { 17*4882a593Smuzhiyun compatible = "st,stih-cec"; 18*4882a593Smuzhiyun reg = <0x94a087c 0x64>; 19*4882a593Smuzhiyun clocks = <&clk_sysin>; 20*4882a593Smuzhiyun clock-names = "cec-clk"; 21*4882a593Smuzhiyun interrupts = <GIC_SPI 140 IRQ_TYPE_NONE>; 22*4882a593Smuzhiyun interrupt-names = "cec-irq"; 23*4882a593Smuzhiyun pinctrl-names = "default"; 24*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_cec0_default>; 25*4882a593Smuzhiyun resets = <&softreset STIH407_LPM_SOFTRESET>; 26*4882a593Smuzhiyun hdmi-phandle = <&hdmi>; 27*4882a593Smuzhiyun}; 28