1*4882a593Smuzhiyundevice-tree bindings for rockchip Transport Stream Processing Module (TSP) 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunTSP is designed for processing Transport Stream Packets, 4*4882a593Smuzhiyunincluding receiving TS packets, PID filtering, TS descrambling, 5*4882a593SmuzhiyunDe-multiplexing and TS outputting.Processed data are transferred to 6*4882a593Smuzhiyunmemory buffer which are continued to be processing by software. 7*4882a593Smuzhiyun 8*4882a593SmuzhiyunRequired properties: 9*4882a593Smuzhiyun- compatible: value should be one of the following 10*4882a593Smuzhiyun "rockchip,rk312x-tsp"; 11*4882a593Smuzhiyun "rockchip,rk3228-tsp"; 12*4882a593Smuzhiyun "rockchip,rk3288-tsp"; 13*4882a593Smuzhiyun "rockchip,rk3328-tsp"; 14*4882a593Smuzhiyun "rockchip,rk3368-tsp"; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun- reg : offset and length of the register set for the device. 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun- interrupts: TSP interrupt specifier. 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun- interrupts-name: should be "irq_tsp". 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun- clocks: phandle to TSP sclk/hclk/aclk clocks 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun- clock-names: should be "clk_tsp", "hclk_tsp" and "aclk_tsp" 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun- pinctrl-names: use "default" 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun- pinctrl-0: pin config for iomux 29*4882a593Smuzhiyun 30*4882a593SmuzhiyunExample: 31*4882a593SmuzhiyunSoC-specific DT entry: 32*4882a593Smuzhiyun tsp: tsp@ff050000 { 33*4882a593Smuzhiyun compatible = "rockchip,rk3328-tsp"; 34*4882a593Smuzhiyun reg = <0x0 0xff050000 0x0 0x10000>; 35*4882a593Smuzhiyun rockchip,grf = <&grf>; 36*4882a593Smuzhiyun interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; 37*4882a593Smuzhiyun interrupt-names = "irq_tsp"; 38*4882a593Smuzhiyun clocks = <&cru SCLK_TSP>, <&cru ACLK_TSP>, <&cru HCLK_TSP>; 39*4882a593Smuzhiyun clock-names = "clk_tsp", "aclk_tsp", "hclk_tsp"; 40*4882a593Smuzhiyun pinctrl-names = "default"; 41*4882a593Smuzhiyun pinctrl-0 = <&tsp_d0 42*4882a593Smuzhiyun &tsp_d1 43*4882a593Smuzhiyun &tsp_d2 44*4882a593Smuzhiyun &tsp_d3 45*4882a593Smuzhiyun &tsp_d4 46*4882a593Smuzhiyun &tsp_d5 47*4882a593Smuzhiyun &tsp_d6 48*4882a593Smuzhiyun &tsp_d7 49*4882a593Smuzhiyun &tsp_sync 50*4882a593Smuzhiyun &tsp_clk 51*4882a593Smuzhiyun &tsp_fail 52*4882a593Smuzhiyun &tsp_valid>; 53*4882a593Smuzhiyun status = "disabled"; 54*4882a593Smuzhiyun }; 55