1*4882a593SmuzhiyunRockchip SoC Image Signal Processing unit v1 2*4882a593Smuzhiyun---------------------------------------------- 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunRockchip ISP1 is the Camera interface for the Rockchip series of SoCs 5*4882a593Smuzhiyunwhich contains image processing, scaling, and compression funcitons. 6*4882a593Smuzhiyun 7*4882a593SmuzhiyunRequired properties: 8*4882a593Smuzhiyun- compatible: value should be one of the following 9*4882a593Smuzhiyun "rockchip,rk1808-rkisp1"; 10*4882a593Smuzhiyun "rockchip,rk3288-rkisp1"; 11*4882a593Smuzhiyun "rockchip,rk3326-rkisp1"; 12*4882a593Smuzhiyun "rockchip,rk3368-rkisp1"; 13*4882a593Smuzhiyun "rockchip,rk3399-rkisp1"; 14*4882a593Smuzhiyun- reg : offset and length of the register set for the device. 15*4882a593Smuzhiyun- interrupts: should contain ISP interrupt. 16*4882a593Smuzhiyun- clocks: phandle to the required clocks. 17*4882a593Smuzhiyun- clock-names: required clock name. 18*4882a593Smuzhiyun- iommus: required a iommu node. 19*4882a593Smuzhiyun 20*4882a593Smuzhiyunport node 21*4882a593Smuzhiyun------------------- 22*4882a593Smuzhiyun 23*4882a593SmuzhiyunThe device node should contain one 'port' child node with child 'endpoint' 24*4882a593Smuzhiyunnodes, according to the bindings defined in Documentation/devicetree/bindings/ 25*4882a593Smuzhiyunmedia/video-interfaces.txt. 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun- endpoint(parallel): 28*4882a593Smuzhiyun - remote-endpoint: Connecting to a sensor with a parallel video bus. 29*4882a593Smuzhiyun - parallel_bus properties: Refer to Documentation/devicetree/bindings/ 30*4882a593Smuzhiyun media/video-interfaces.txt. 31*4882a593Smuzhiyun- endpoint(mipi): 32*4882a593Smuzhiyun - remote-endpoint: Connecting to Rockchip MIPI-DPHY, 33*4882a593Smuzhiyun which is defined in rockchip-mipi-dphy.txt. 34*4882a593Smuzhiyun 35*4882a593SmuzhiyunThe port node must contain at least one endpoint, either parallel or mipi. 36*4882a593SmuzhiyunIt could have multiple endpoints, but please note the hardware don't support 37*4882a593Smuzhiyuntwo sensors work at a time, they are supposed to work asynchronously. 38*4882a593Smuzhiyun 39*4882a593SmuzhiyunDevice node example 40*4882a593Smuzhiyun------------------- 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun isp0: isp0@ff910000 { 43*4882a593Smuzhiyun compatible = "rockchip,rk3399-rkisp1"; 44*4882a593Smuzhiyun reg = <0x0 0xff910000 0x0 0x4000>; 45*4882a593Smuzhiyun interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH 0>; 46*4882a593Smuzhiyun clocks = <&cru SCLK_ISP0>, 47*4882a593Smuzhiyun <&cru ACLK_ISP0>, <&cru ACLK_ISP0_WRAPPER>, 48*4882a593Smuzhiyun <&cru HCLK_ISP0>, <&cru HCLK_ISP0_WRAPPER>; 49*4882a593Smuzhiyun clock-names = "clk_isp", 50*4882a593Smuzhiyun "aclk_isp", "aclk_isp_wrap", 51*4882a593Smuzhiyun "hclk_isp", "hclk_isp_wrap"; 52*4882a593Smuzhiyun power-domains = <&power RK3399_PD_ISP0>; 53*4882a593Smuzhiyun iommus = <&isp0_mmu>; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun port { 56*4882a593Smuzhiyun #address-cells = <1>; 57*4882a593Smuzhiyun #size-cells = <0>; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun /* mipi */ 60*4882a593Smuzhiyun isp0_mipi_in: endpoint@0 { 61*4882a593Smuzhiyun reg = <0>; 62*4882a593Smuzhiyun remote-endpoint = <&dphy_rx0_out>; 63*4882a593Smuzhiyun }; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun /* parallel */ 66*4882a593Smuzhiyun isp0_parallel_in: endpoint@1 { 67*4882a593Smuzhiyun reg = <1>; 68*4882a593Smuzhiyun remote-endpoint = <&ov5640_out>; 69*4882a593Smuzhiyun bus-width = <8>; 70*4882a593Smuzhiyun }; 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun }; 73