xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/media/renesas,vin.yaml (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun# Copyright (C) 2020 Renesas Electronics Corp.
3*4882a593Smuzhiyun%YAML 1.2
4*4882a593Smuzhiyun---
5*4882a593Smuzhiyun$id: http://devicetree.org/schemas/media/renesas,vin.yaml#
6*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml#
7*4882a593Smuzhiyun
8*4882a593Smuzhiyuntitle: Renesas R-Car Video Input (VIN)
9*4882a593Smuzhiyun
10*4882a593Smuzhiyunmaintainers:
11*4882a593Smuzhiyun  - Niklas Söderlund <niklas.soderlund@ragnatech.se>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyundescription:
14*4882a593Smuzhiyun  The R-Car Video Input (VIN) device provides video input capabilities for the
15*4882a593Smuzhiyun  Renesas R-Car family of devices.
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun  Each VIN instance has a single parallel input that supports RGB and YUV video,
18*4882a593Smuzhiyun  with both external synchronization and BT.656 synchronization for the latter.
19*4882a593Smuzhiyun  Depending on the instance the VIN input is connected to external SoC pins, or
20*4882a593Smuzhiyun  on Gen3 and RZ/G2 platforms to a CSI-2 receiver.
21*4882a593Smuzhiyun
22*4882a593Smuzhiyunproperties:
23*4882a593Smuzhiyun  compatible:
24*4882a593Smuzhiyun    oneOf:
25*4882a593Smuzhiyun      - items:
26*4882a593Smuzhiyun          - enum:
27*4882a593Smuzhiyun              - renesas,vin-r8a7742  # RZ/G1H
28*4882a593Smuzhiyun              - renesas,vin-r8a7743  # RZ/G1M
29*4882a593Smuzhiyun              - renesas,vin-r8a7744  # RZ/G1N
30*4882a593Smuzhiyun              - renesas,vin-r8a7745  # RZ/G1E
31*4882a593Smuzhiyun              - renesas,vin-r8a77470 # RZ/G1C
32*4882a593Smuzhiyun              - renesas,vin-r8a7790  # R-Car H2
33*4882a593Smuzhiyun              - renesas,vin-r8a7791  # R-Car M2-W
34*4882a593Smuzhiyun              - renesas,vin-r8a7792  # R-Car V2H
35*4882a593Smuzhiyun              - renesas,vin-r8a7793  # R-Car M2-N
36*4882a593Smuzhiyun              - renesas,vin-r8a7794  # R-Car E2
37*4882a593Smuzhiyun          - const: renesas,rcar-gen2-vin # Generic R-Car Gen2 or RZ/G1
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun      - items:
40*4882a593Smuzhiyun          - enum:
41*4882a593Smuzhiyun              - renesas,vin-r8a774a1 # RZ/G2M
42*4882a593Smuzhiyun              - renesas,vin-r8a774b1 # RZ/G2N
43*4882a593Smuzhiyun              - renesas,vin-r8a774c0 # RZ/G2E
44*4882a593Smuzhiyun              - renesas,vin-r8a774e1 # RZ/G2H
45*4882a593Smuzhiyun              - renesas,vin-r8a7778  # R-Car M1
46*4882a593Smuzhiyun              - renesas,vin-r8a7779  # R-Car H1
47*4882a593Smuzhiyun              - renesas,vin-r8a7795  # R-Car H3
48*4882a593Smuzhiyun              - renesas,vin-r8a7796  # R-Car M3-W
49*4882a593Smuzhiyun              - renesas,vin-r8a77965 # R-Car M3-N
50*4882a593Smuzhiyun              - renesas,vin-r8a77970 # R-Car V3M
51*4882a593Smuzhiyun              - renesas,vin-r8a77980 # R-Car V3H
52*4882a593Smuzhiyun              - renesas,vin-r8a77990 # R-Car E3
53*4882a593Smuzhiyun              - renesas,vin-r8a77995 # R-Car D3
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun  reg:
56*4882a593Smuzhiyun    maxItems: 1
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun  interrupts:
59*4882a593Smuzhiyun    maxItems: 1
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun  clocks:
62*4882a593Smuzhiyun    maxItems: 1
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun  power-domains:
65*4882a593Smuzhiyun    maxItems: 1
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun  resets:
68*4882a593Smuzhiyun    maxItems: 1
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun  #The per-board settings for Gen2 and RZ/G1 platforms:
71*4882a593Smuzhiyun  port:
72*4882a593Smuzhiyun    type: object
73*4882a593Smuzhiyun    description:
74*4882a593Smuzhiyun      A node containing a parallel input with a single endpoint definitions as
75*4882a593Smuzhiyun      documented in
76*4882a593Smuzhiyun      Documentation/devicetree/bindings/media/video-interfaces.txt
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun    properties:
79*4882a593Smuzhiyun      endpoint:
80*4882a593Smuzhiyun        type: object
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun        properties:
83*4882a593Smuzhiyun          hsync-active:
84*4882a593Smuzhiyun            description:
85*4882a593Smuzhiyun              If both HSYNC and VSYNC polarities are not specified, embedded
86*4882a593Smuzhiyun              synchronization is selected.
87*4882a593Smuzhiyun            default: 1
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun          vsync-active:
90*4882a593Smuzhiyun            description:
91*4882a593Smuzhiyun              If both HSYNC and VSYNC polarities are not specified, embedded
92*4882a593Smuzhiyun              synchronization is selected.
93*4882a593Smuzhiyun            default: 1
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun          field-active-even: true
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun          bus-width: true
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun          data-shift: true
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun          data-enable-active:
102*4882a593Smuzhiyun            description: Polarity of CLKENB signal
103*4882a593Smuzhiyun            default: 1
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun          pclk-sample: true
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun          data-active: true
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun          remote-endpoint: true
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun        required:
112*4882a593Smuzhiyun          - remote-endpoint
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun        additionalProperties: false
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun    additionalProperties: false
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun  #The per-board settings for Gen3 and RZ/G2 platforms:
119*4882a593Smuzhiyun  renesas,id:
120*4882a593Smuzhiyun    description: VIN channel number
121*4882a593Smuzhiyun    $ref: /schemas/types.yaml#/definitions/uint32
122*4882a593Smuzhiyun    minimum: 0
123*4882a593Smuzhiyun    maximum: 15
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun  ports:
126*4882a593Smuzhiyun    type: object
127*4882a593Smuzhiyun    description:
128*4882a593Smuzhiyun      A node containing input nodes with endpoint definitions as documented in
129*4882a593Smuzhiyun      Documentation/devicetree/bindings/media/video-interfaces.txt
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun    properties:
132*4882a593Smuzhiyun      port@0:
133*4882a593Smuzhiyun        type: object
134*4882a593Smuzhiyun        description:
135*4882a593Smuzhiyun          Input port node, single endpoint describing a parallel input source.
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun        properties:
138*4882a593Smuzhiyun          reg:
139*4882a593Smuzhiyun            const: 0
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun          endpoint:
142*4882a593Smuzhiyun            type: object
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun            properties:
145*4882a593Smuzhiyun              hsync-active:
146*4882a593Smuzhiyun                description:
147*4882a593Smuzhiyun                  If both HSYNC and VSYNC polarities are not specified, embedded
148*4882a593Smuzhiyun                  synchronization is selected.
149*4882a593Smuzhiyun                default: 1
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun              vsync-active:
152*4882a593Smuzhiyun                description:
153*4882a593Smuzhiyun                  If both HSYNC and VSYNC polarities are not specified, embedded
154*4882a593Smuzhiyun                  synchronization is selected.
155*4882a593Smuzhiyun                default: 1
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun              field-active-even: true
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun              bus-width: true
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun              data-shift: true
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun              data-enable-active:
164*4882a593Smuzhiyun                description: Polarity of CLKENB signal
165*4882a593Smuzhiyun                default: 1
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun              pclk-sample: true
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun              data-active: true
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun              remote-endpoint: true
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun            required:
174*4882a593Smuzhiyun              - remote-endpoint
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun            additionalProperties: false
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun        required:
179*4882a593Smuzhiyun          - endpoint
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun        additionalProperties: false
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun      port@1:
184*4882a593Smuzhiyun        type: object
185*4882a593Smuzhiyun        description:
186*4882a593Smuzhiyun          Input port node, multiple endpoints describing all the R-Car CSI-2
187*4882a593Smuzhiyun          modules connected the VIN.
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun        properties:
190*4882a593Smuzhiyun          '#address-cells':
191*4882a593Smuzhiyun            const: 1
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun          '#size-cells':
194*4882a593Smuzhiyun            const: 0
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun          reg:
197*4882a593Smuzhiyun            const: 1
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun          endpoint@0:
200*4882a593Smuzhiyun            type: object
201*4882a593Smuzhiyun            description: Endpoint connected to CSI20.
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun            properties:
204*4882a593Smuzhiyun              reg:
205*4882a593Smuzhiyun                const: 0
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun              remote-endpoint: true
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun            required:
210*4882a593Smuzhiyun              - reg
211*4882a593Smuzhiyun              - remote-endpoint
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun            additionalProperties: false
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun          endpoint@1:
216*4882a593Smuzhiyun            type: object
217*4882a593Smuzhiyun            description: Endpoint connected to CSI21.
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun            properties:
220*4882a593Smuzhiyun              reg:
221*4882a593Smuzhiyun                const: 1
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun              remote-endpoint: true
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun            required:
226*4882a593Smuzhiyun              - reg
227*4882a593Smuzhiyun              - remote-endpoint
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun            additionalProperties: false
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun          endpoint@2:
232*4882a593Smuzhiyun            type: object
233*4882a593Smuzhiyun            description: Endpoint connected to CSI40.
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun            properties:
236*4882a593Smuzhiyun              reg:
237*4882a593Smuzhiyun                const: 2
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun              remote-endpoint: true
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun            required:
242*4882a593Smuzhiyun              - reg
243*4882a593Smuzhiyun              - remote-endpoint
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun            additionalProperties: false
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun          endpoint@3:
248*4882a593Smuzhiyun            type: object
249*4882a593Smuzhiyun            description: Endpoint connected to CSI41.
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun            properties:
252*4882a593Smuzhiyun              reg:
253*4882a593Smuzhiyun                const: 3
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun              remote-endpoint: true
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun            required:
258*4882a593Smuzhiyun              - reg
259*4882a593Smuzhiyun              - remote-endpoint
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun            additionalProperties: false
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun        anyOf:
264*4882a593Smuzhiyun          - required:
265*4882a593Smuzhiyun              - endpoint@0
266*4882a593Smuzhiyun          - required:
267*4882a593Smuzhiyun              - endpoint@1
268*4882a593Smuzhiyun          - required:
269*4882a593Smuzhiyun              - endpoint@2
270*4882a593Smuzhiyun          - required:
271*4882a593Smuzhiyun              - endpoint@3
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun        additionalProperties: false
274*4882a593Smuzhiyun
275*4882a593Smuzhiyunrequired:
276*4882a593Smuzhiyun  - compatible
277*4882a593Smuzhiyun  - reg
278*4882a593Smuzhiyun  - interrupts
279*4882a593Smuzhiyun  - clocks
280*4882a593Smuzhiyun  - power-domains
281*4882a593Smuzhiyun
282*4882a593SmuzhiyunallOf:
283*4882a593Smuzhiyun  - if:
284*4882a593Smuzhiyun      not:
285*4882a593Smuzhiyun        properties:
286*4882a593Smuzhiyun          compatible:
287*4882a593Smuzhiyun            contains:
288*4882a593Smuzhiyun              enum:
289*4882a593Smuzhiyun                - renesas,vin-r8a7778
290*4882a593Smuzhiyun                - renesas,vin-r8a7779
291*4882a593Smuzhiyun    then:
292*4882a593Smuzhiyun      required:
293*4882a593Smuzhiyun        - resets
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun  - if:
296*4882a593Smuzhiyun      properties:
297*4882a593Smuzhiyun        compatible:
298*4882a593Smuzhiyun          contains:
299*4882a593Smuzhiyun            enum:
300*4882a593Smuzhiyun              - renesas,vin-r8a7778
301*4882a593Smuzhiyun              - renesas,vin-r8a7779
302*4882a593Smuzhiyun              - renesas,rcar-gen2-vin
303*4882a593Smuzhiyun    then:
304*4882a593Smuzhiyun      required:
305*4882a593Smuzhiyun        - port
306*4882a593Smuzhiyun    else:
307*4882a593Smuzhiyun      required:
308*4882a593Smuzhiyun        - renesas,id
309*4882a593Smuzhiyun        - ports
310*4882a593Smuzhiyun
311*4882a593SmuzhiyunadditionalProperties: false
312*4882a593Smuzhiyun
313*4882a593Smuzhiyunexamples:
314*4882a593Smuzhiyun  # Device node example for Gen2 platform
315*4882a593Smuzhiyun  - |
316*4882a593Smuzhiyun    #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
317*4882a593Smuzhiyun    #include <dt-bindings/interrupt-controller/arm-gic.h>
318*4882a593Smuzhiyun    #include <dt-bindings/power/r8a7790-sysc.h>
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun    vin1: vin@e6ef1000 {
321*4882a593Smuzhiyun            compatible = "renesas,vin-r8a7790",
322*4882a593Smuzhiyun                         "renesas,rcar-gen2-vin";
323*4882a593Smuzhiyun            reg = <0xe6ef1000 0x1000>;
324*4882a593Smuzhiyun            interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
325*4882a593Smuzhiyun            clocks = <&cpg CPG_MOD 810>;
326*4882a593Smuzhiyun            power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
327*4882a593Smuzhiyun            resets = <&cpg 810>;
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun            port {
330*4882a593Smuzhiyun                    vin1ep0: endpoint {
331*4882a593Smuzhiyun                            remote-endpoint = <&adv7180>;
332*4882a593Smuzhiyun                            bus-width = <8>;
333*4882a593Smuzhiyun                    };
334*4882a593Smuzhiyun            };
335*4882a593Smuzhiyun    };
336*4882a593Smuzhiyun
337*4882a593Smuzhiyun  # Device node example for Gen3 platform with only CSI-2
338*4882a593Smuzhiyun  - |
339*4882a593Smuzhiyun    #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
340*4882a593Smuzhiyun    #include <dt-bindings/interrupt-controller/arm-gic.h>
341*4882a593Smuzhiyun    #include <dt-bindings/power/r8a7795-sysc.h>
342*4882a593Smuzhiyun
343*4882a593Smuzhiyun    vin0: video@e6ef0000 {
344*4882a593Smuzhiyun            compatible = "renesas,vin-r8a7795";
345*4882a593Smuzhiyun            reg = <0xe6ef0000 0x1000>;
346*4882a593Smuzhiyun            interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
347*4882a593Smuzhiyun            clocks = <&cpg CPG_MOD 811>;
348*4882a593Smuzhiyun            power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
349*4882a593Smuzhiyun            resets = <&cpg 811>;
350*4882a593Smuzhiyun            renesas,id = <0>;
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun            ports {
353*4882a593Smuzhiyun                    #address-cells = <1>;
354*4882a593Smuzhiyun                    #size-cells = <0>;
355*4882a593Smuzhiyun
356*4882a593Smuzhiyun                    port@1 {
357*4882a593Smuzhiyun                            #address-cells = <1>;
358*4882a593Smuzhiyun                            #size-cells = <0>;
359*4882a593Smuzhiyun
360*4882a593Smuzhiyun                            reg = <1>;
361*4882a593Smuzhiyun
362*4882a593Smuzhiyun                            vin0csi20: endpoint@0 {
363*4882a593Smuzhiyun                                    reg = <0>;
364*4882a593Smuzhiyun                                    remote-endpoint= <&csi20vin0>;
365*4882a593Smuzhiyun                            };
366*4882a593Smuzhiyun                            vin0csi40: endpoint@2 {
367*4882a593Smuzhiyun                                    reg = <2>;
368*4882a593Smuzhiyun                                    remote-endpoint= <&csi40vin0>;
369*4882a593Smuzhiyun                            };
370*4882a593Smuzhiyun                    };
371*4882a593Smuzhiyun            };
372*4882a593Smuzhiyun    };
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun  # Device node example for Gen3 platform with CSI-2 and parallel
375*4882a593Smuzhiyun  - |
376*4882a593Smuzhiyun    #include <dt-bindings/clock/r8a77970-cpg-mssr.h>
377*4882a593Smuzhiyun    #include <dt-bindings/interrupt-controller/arm-gic.h>
378*4882a593Smuzhiyun    #include <dt-bindings/power/r8a77970-sysc.h>
379*4882a593Smuzhiyun
380*4882a593Smuzhiyun    vin2: video@e6ef2000 {
381*4882a593Smuzhiyun            compatible = "renesas,vin-r8a77970";
382*4882a593Smuzhiyun            reg = <0xe6ef2000 0x1000>;
383*4882a593Smuzhiyun            interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
384*4882a593Smuzhiyun            clocks = <&cpg CPG_MOD 809>;
385*4882a593Smuzhiyun            power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
386*4882a593Smuzhiyun            resets = <&cpg 809>;
387*4882a593Smuzhiyun            renesas,id = <2>;
388*4882a593Smuzhiyun
389*4882a593Smuzhiyun            ports {
390*4882a593Smuzhiyun                    #address-cells = <1>;
391*4882a593Smuzhiyun                    #size-cells = <0>;
392*4882a593Smuzhiyun
393*4882a593Smuzhiyun                    port@0 {
394*4882a593Smuzhiyun                            reg = <0>;
395*4882a593Smuzhiyun
396*4882a593Smuzhiyun                            vin2_in: endpoint {
397*4882a593Smuzhiyun                                    remote-endpoint = <&adv7612_out>;
398*4882a593Smuzhiyun                                    hsync-active = <0>;
399*4882a593Smuzhiyun                                    vsync-active = <0>;
400*4882a593Smuzhiyun                            };
401*4882a593Smuzhiyun                    };
402*4882a593Smuzhiyun
403*4882a593Smuzhiyun                    port@1 {
404*4882a593Smuzhiyun                            #address-cells = <1>;
405*4882a593Smuzhiyun                            #size-cells = <0>;
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun                            reg = <1>;
408*4882a593Smuzhiyun
409*4882a593Smuzhiyun                            vin2csi40: endpoint@2 {
410*4882a593Smuzhiyun                                    reg = <2>;
411*4882a593Smuzhiyun                                    remote-endpoint = <&csi40vin2>;
412*4882a593Smuzhiyun                            };
413*4882a593Smuzhiyun                    };
414*4882a593Smuzhiyun            };
415*4882a593Smuzhiyun    };
416