1*4882a593SmuzhiyunRenesas R-Car Image Renderer (Distortion Correction Engine) 2*4882a593Smuzhiyun----------------------------------------------------------- 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunThe image renderer, or the distortion correction engine, is a drawing processor 5*4882a593Smuzhiyunwith a simple instruction system capable of referencing video capture data or 6*4882a593Smuzhiyundata in an external memory as 2D texture data and performing texture mapping 7*4882a593Smuzhiyunand drawing with respect to any shape that is split into triangular objects. 8*4882a593Smuzhiyun 9*4882a593SmuzhiyunRequired properties: 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun- compatible: "renesas,<soctype>-imr-lx4", "renesas,imr-lx4" as a fallback for 12*4882a593Smuzhiyun the image renderer light extended 4 (IMR-LX4) found in the R-Car gen3 SoCs, 13*4882a593Smuzhiyun where the examples with <soctype> are: 14*4882a593Smuzhiyun - "renesas,r8a7795-imr-lx4" for R-Car H3, 15*4882a593Smuzhiyun - "renesas,r8a7796-imr-lx4" for R-Car M3-W. 16*4882a593Smuzhiyun- reg: offset and length of the register block; 17*4882a593Smuzhiyun- interrupts: single interrupt specifier; 18*4882a593Smuzhiyun- clocks: single clock phandle/specifier pair; 19*4882a593Smuzhiyun- power-domains: power domain phandle/specifier pair; 20*4882a593Smuzhiyun- resets: reset phandle/specifier pair. 21*4882a593Smuzhiyun 22*4882a593SmuzhiyunExample: 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun imr-lx4@fe860000 { 25*4882a593Smuzhiyun compatible = "renesas,r8a7795-imr-lx4", "renesas,imr-lx4"; 26*4882a593Smuzhiyun reg = <0 0xfe860000 0 0x2000>; 27*4882a593Smuzhiyun interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; 28*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 823>; 29*4882a593Smuzhiyun power-domains = <&sysc R8A7795_PD_A3VC>; 30*4882a593Smuzhiyun resets = <&cpg 823>; 31*4882a593Smuzhiyun }; 32