1*4882a593Smuzhiyun* smartsens,sc200ai MIPI sensor 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired Properties: 4*4882a593Smuzhiyun- compatible: should be "smartsens,sc200ai" 5*4882a593Smuzhiyun- clocks: reference to the 27M xvclk input clock. 6*4882a593Smuzhiyun- clock-names: should be "xvclk". 7*4882a593Smuzhiyun- dovdd-supply: Digital I/O voltage supply, 1.8 volts 8*4882a593Smuzhiyun- avdd-supply: Analog voltage supply, 2.8 volts 9*4882a593Smuzhiyun- dvdd-supply: Digital core voltage supply, 1.2 volts 10*4882a593Smuzhiyun- reset-gpios: High active reset gpio 11*4882a593Smuzhiyun 12*4882a593SmuzhiyunAttention: 13*4882a593SmuzhiyunSC4238 device address 0x30(7bit)； 14*4882a593Smuzhiyun 15*4882a593SmuzhiyunThe device node must contain one 'port' child node for its digital output 16*4882a593Smuzhiyunvideo port, in accordance with the video interface bindings defined in 17*4882a593SmuzhiyunDocumentation/devicetree/bindings/media/video-interfaces.txt. 18*4882a593Smuzhiyun 19*4882a593SmuzhiyunExample: 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun&i2c1 { 22*4882a593Smuzhiyun status = "okay"; 23*4882a593Smuzhiyun sc200ai: sc200ai@30 { 24*4882a593Smuzhiyun compatible = "smartsens,sc200ai"; 25*4882a593Smuzhiyun reg = <0x30>; 26*4882a593Smuzhiyun clocks = <&cru CLK_MIPICSI_OUT>; 27*4882a593Smuzhiyun clock-names = "xvclk"; 28*4882a593Smuzhiyun power-domains = <&power RV1126_PD_VI>; 29*4882a593Smuzhiyun pinctrl-names = "rockchip,camera_default"; 30*4882a593Smuzhiyun pinctrl-0 = <&mipicsi_clk0>; 31*4882a593Smuzhiyun avdd-supply = <&vcc_avdd>; 32*4882a593Smuzhiyun dovdd-supply = <&vcc_dovdd>; 33*4882a593Smuzhiyun dvdd-supply = <&vcc_dvdd>; 34*4882a593Smuzhiyun pwdn-gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>; 35*4882a593Smuzhiyun reset-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>; 36*4882a593Smuzhiyun rockchip,camera-module-index = <1>; 37*4882a593Smuzhiyun rockchip,camera-module-facing = "front"; 38*4882a593Smuzhiyun rockchip,camera-module-name = "C7234A-400"; 39*4882a593Smuzhiyun rockchip,camera-module-lens-name = "30IRC-2MP-F20"; 40*4882a593Smuzhiyun /* NO_HDR:0 HDR_X2:5 HDR_X3:6 */ 41*4882a593Smuzhiyun rockchip,camera-hdr-mode = <5>; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun port { 44*4882a593Smuzhiyun sc4238_out: endpoint { 45*4882a593Smuzhiyun remote-endpoint = <&mipi_in_ucam1>; 46*4882a593Smuzhiyun data-lanes = <1 2>; 47*4882a593Smuzhiyun }; 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun }; 50*4882a593Smuzhiyun}; 51