1*4882a593Smuzhiyun* Omnivision 1/4-Inch 5Mp CMOS Digital Image Sensor 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThe Omnivision OV5645 is a 1/4-Inch CMOS active pixel digital image sensor with 4*4882a593Smuzhiyunan active array size of 2592H x 1944V. It is programmable through a serial I2C 5*4882a593Smuzhiyuninterface. 6*4882a593Smuzhiyun 7*4882a593SmuzhiyunRequired Properties: 8*4882a593Smuzhiyun- compatible: Value should be "ovti,ov5645". 9*4882a593Smuzhiyun- clocks: Reference to the xclk clock. 10*4882a593Smuzhiyun- clock-names: Should be "xclk". 11*4882a593Smuzhiyun- clock-frequency: Frequency of the xclk clock. 12*4882a593Smuzhiyun- enable-gpios: Chip enable GPIO. Polarity is GPIO_ACTIVE_HIGH. This corresponds 13*4882a593Smuzhiyun to the hardware pin PWDNB which is physically active low. 14*4882a593Smuzhiyun- reset-gpios: Chip reset GPIO. Polarity is GPIO_ACTIVE_LOW. This corresponds to 15*4882a593Smuzhiyun the hardware pin RESETB. 16*4882a593Smuzhiyun- vdddo-supply: Chip digital IO regulator. 17*4882a593Smuzhiyun- vdda-supply: Chip analog regulator. 18*4882a593Smuzhiyun- vddd-supply: Chip digital core regulator. 19*4882a593Smuzhiyun 20*4882a593SmuzhiyunThe device node must contain one 'port' child node for its digital output 21*4882a593Smuzhiyunvideo port, in accordance with the video interface bindings defined in 22*4882a593SmuzhiyunDocumentation/devicetree/bindings/media/video-interfaces.txt. 23*4882a593Smuzhiyun 24*4882a593SmuzhiyunExample: 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun &i2c1 { 27*4882a593Smuzhiyun ... 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun ov5645: ov5645@3c { 30*4882a593Smuzhiyun compatible = "ovti,ov5645"; 31*4882a593Smuzhiyun reg = <0x3c>; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun enable-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; 34*4882a593Smuzhiyun reset-gpios = <&gpio5 20 GPIO_ACTIVE_LOW>; 35*4882a593Smuzhiyun pinctrl-names = "default"; 36*4882a593Smuzhiyun pinctrl-0 = <&camera_rear_default>; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun clocks = <&clks 200>; 39*4882a593Smuzhiyun clock-names = "xclk"; 40*4882a593Smuzhiyun clock-frequency = <24000000>; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun vdddo-supply = <&camera_dovdd_1v8>; 43*4882a593Smuzhiyun vdda-supply = <&camera_avdd_2v8>; 44*4882a593Smuzhiyun vddd-supply = <&camera_dvdd_1v2>; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun port { 47*4882a593Smuzhiyun ov5645_ep: endpoint { 48*4882a593Smuzhiyun clock-lanes = <1>; 49*4882a593Smuzhiyun data-lanes = <0 2>; 50*4882a593Smuzhiyun remote-endpoint = <&csi0_ep>; 51*4882a593Smuzhiyun }; 52*4882a593Smuzhiyun }; 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun }; 55