1*4882a593Smuzhiyun* Sony IMX323 DVP sensor 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired Properties: 4*4882a593Smuzhiyun- compatible: should be "sony,imx323" 5*4882a593Smuzhiyun- clocks: reference to the 37.125M xvclk input clock. 6*4882a593Smuzhiyun- clock-names: should be "xvclk". 7*4882a593Smuzhiyun- dovdd-supply: Digital I/O voltage supply, 1.8 volts 8*4882a593Smuzhiyun- avdd-supply: Analog voltage supply, 2.8 volts 9*4882a593Smuzhiyun- dvdd-supply: Digital core voltage supply, 1.2 volts 10*4882a593Smuzhiyun- reset-gpios: Low active reset gpio 11*4882a593Smuzhiyun 12*4882a593SmuzhiyunThe device node must contain one 'port' child node for its digital output 13*4882a593Smuzhiyunvideo port, in accordance with the video interface bindings defined in 14*4882a593SmuzhiyunDocumentation/devicetree/bindings/media/video-interfaces.txt. 15*4882a593Smuzhiyun 16*4882a593SmuzhiyunExample: 17*4882a593Smuzhiyun&i2c3: imx323@1a { 18*4882a593Smuzhiyun compatible = "sony,imx323"; 19*4882a593Smuzhiyun reg = <0x1a>; 20*4882a593Smuzhiyun clocks = <&cru SCLK_CIF_OUT>; 21*4882a593Smuzhiyun clock-names = "xvclk"; 22*4882a593Smuzhiyun avdd-supply = <&vcc2v8_dvp>; 23*4882a593Smuzhiyun dovdd-supply = <&vcc1v8_dvp>; 24*4882a593Smuzhiyun dvdd-supply = <&vdd1v5_dvp>; 25*4882a593Smuzhiyun pwdn-gpios = <&gpio2 RK_PC4 GPIO_ACTIVE_HIGH>; 26*4882a593Smuzhiyun reset-gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>; 27*4882a593Smuzhiyun pinctrl-names = "default"; 28*4882a593Smuzhiyun pinctrl-0 = <&dvp_d0d1_m0 &dvp_d2d9_m0 29*4882a593Smuzhiyun &dvp_d10d11_m0 &cif_clkout_m0>; 30*4882a593Smuzhiyun port { 31*4882a593Smuzhiyun imx323_out: endpoint { 32*4882a593Smuzhiyun remote-endpoint = <&isp0_dvp_in>; 33*4882a593Smuzhiyun }; 34*4882a593Smuzhiyun }; 35*4882a593Smuzhiyun}; 36