1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2*4882a593Smuzhiyun# Copyright (c) 2020 MediaTek Inc. 3*4882a593Smuzhiyun%YAML 1.2 4*4882a593Smuzhiyun--- 5*4882a593Smuzhiyun$id: http://devicetree.org/schemas/media/i2c/dongwoon,dw9768.yaml# 6*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 7*4882a593Smuzhiyun 8*4882a593Smuzhiyuntitle: Dongwoon Anatech DW9768 Voice Coil Motor (VCM) Lens Device Tree Bindings 9*4882a593Smuzhiyun 10*4882a593Smuzhiyunmaintainers: 11*4882a593Smuzhiyun - Dongchun Zhu <dongchun.zhu@mediatek.com> 12*4882a593Smuzhiyun 13*4882a593Smuzhiyundescription: |- 14*4882a593Smuzhiyun The Dongwoon DW9768 is a single 10-bit digital-to-analog (DAC) converter 15*4882a593Smuzhiyun with 100 mA output current sink capability. VCM current is controlled with 16*4882a593Smuzhiyun a linear mode driver. The DAC is controlled via a 2-wire (I2C-compatible) 17*4882a593Smuzhiyun serial interface that operates at clock rates up to 1MHz. This chip 18*4882a593Smuzhiyun integrates Advanced Actuator Control (AAC) technology and is intended for 19*4882a593Smuzhiyun driving voice coil lenses in camera modules. 20*4882a593Smuzhiyun 21*4882a593Smuzhiyunproperties: 22*4882a593Smuzhiyun compatible: 23*4882a593Smuzhiyun enum: 24*4882a593Smuzhiyun - dongwoon,dw9768 # for DW9768 VCM 25*4882a593Smuzhiyun - giantec,gt9769 # for GT9769 VCM 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun reg: 28*4882a593Smuzhiyun maxItems: 1 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun vin-supply: 31*4882a593Smuzhiyun description: 32*4882a593Smuzhiyun Definition of the regulator used as Digital I/O voltage supply. 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun vdd-supply: 35*4882a593Smuzhiyun description: 36*4882a593Smuzhiyun Definition of the regulator used as Digital core voltage supply. 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun dongwoon,aac-mode: 39*4882a593Smuzhiyun description: 40*4882a593Smuzhiyun Indication of AAC mode select. 41*4882a593Smuzhiyun $ref: "/schemas/types.yaml#/definitions/uint32" 42*4882a593Smuzhiyun enum: 43*4882a593Smuzhiyun - 1 # AAC2 mode(operation time# 0.48 x Tvib) 44*4882a593Smuzhiyun - 2 # AAC3 mode(operation time# 0.70 x Tvib) 45*4882a593Smuzhiyun - 3 # AAC4 mode(operation time# 0.75 x Tvib) 46*4882a593Smuzhiyun - 5 # AAC8 mode(operation time# 1.13 x Tvib) 47*4882a593Smuzhiyun default: 2 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun dongwoon,aac-timing: 50*4882a593Smuzhiyun description: 51*4882a593Smuzhiyun Number of AAC Timing count that controlled by one 6-bit period of 52*4882a593Smuzhiyun vibration register AACT[5:0], the unit of which is 100 us. 53*4882a593Smuzhiyun $ref: "/schemas/types.yaml#/definitions/uint32" 54*4882a593Smuzhiyun default: 0x20 55*4882a593Smuzhiyun minimum: 0x00 56*4882a593Smuzhiyun maximum: 0x3f 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun dongwoon,clock-presc: 59*4882a593Smuzhiyun description: 60*4882a593Smuzhiyun Indication of VCM internal clock dividing rate select, as one multiple 61*4882a593Smuzhiyun factor to calculate VCM ring periodic time Tvib. 62*4882a593Smuzhiyun $ref: "/schemas/types.yaml#/definitions/uint32" 63*4882a593Smuzhiyun enum: 64*4882a593Smuzhiyun - 0 # Dividing Rate - 2 65*4882a593Smuzhiyun - 1 # Dividing Rate - 1 66*4882a593Smuzhiyun - 2 # Dividing Rate - 1/2 67*4882a593Smuzhiyun - 3 # Dividing Rate - 1/4 68*4882a593Smuzhiyun - 4 # Dividing Rate - 8 69*4882a593Smuzhiyun - 5 # Dividing Rate - 4 70*4882a593Smuzhiyun default: 1 71*4882a593Smuzhiyun 72*4882a593Smuzhiyunrequired: 73*4882a593Smuzhiyun - compatible 74*4882a593Smuzhiyun - reg 75*4882a593Smuzhiyun - vin-supply 76*4882a593Smuzhiyun - vdd-supply 77*4882a593Smuzhiyun 78*4882a593SmuzhiyunadditionalProperties: false 79*4882a593Smuzhiyun 80*4882a593Smuzhiyunexamples: 81*4882a593Smuzhiyun - | 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun i2c { 84*4882a593Smuzhiyun #address-cells = <1>; 85*4882a593Smuzhiyun #size-cells = <0>; 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun dw9768: camera-lens@c { 88*4882a593Smuzhiyun compatible = "dongwoon,dw9768"; 89*4882a593Smuzhiyun reg = <0x0c>; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun vin-supply = <&mt6358_vcamio_reg>; 92*4882a593Smuzhiyun vdd-supply = <&mt6358_vcama2_reg>; 93*4882a593Smuzhiyun dongwoon,aac-timing = <0x39>; 94*4882a593Smuzhiyun }; 95*4882a593Smuzhiyun }; 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun... 98