1*4882a593Smuzhiyun* Device tree bindings for Aspeed Video Engine 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThe Video Engine (VE) embedded in the Aspeed AST2400/2500/2600 SOCs can 4*4882a593Smuzhiyuncapture and compress video data from digital or analog sources. 5*4882a593Smuzhiyun 6*4882a593SmuzhiyunRequired properties: 7*4882a593Smuzhiyun - compatible: "aspeed,ast2400-video-engine" or 8*4882a593Smuzhiyun "aspeed,ast2500-video-engine" or 9*4882a593Smuzhiyun "aspeed,ast2600-video-engine" 10*4882a593Smuzhiyun - reg: contains the offset and length of the VE memory region 11*4882a593Smuzhiyun - clocks: clock specifiers for the syscon clocks associated with 12*4882a593Smuzhiyun the VE (ordering must match the clock-names property) 13*4882a593Smuzhiyun - clock-names: "vclk" and "eclk" 14*4882a593Smuzhiyun - resets: reset specifier for the syscon reset associated with 15*4882a593Smuzhiyun the VE 16*4882a593Smuzhiyun - interrupts: the interrupt associated with the VE on this platform 17*4882a593Smuzhiyun 18*4882a593SmuzhiyunOptional properties: 19*4882a593Smuzhiyun - memory-region: 20*4882a593Smuzhiyun phandle to a memory region to allocate from, as defined in 21*4882a593Smuzhiyun Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt 22*4882a593Smuzhiyun 23*4882a593SmuzhiyunExample: 24*4882a593Smuzhiyun 25*4882a593Smuzhiyunvideo-engine@1e700000 { 26*4882a593Smuzhiyun compatible = "aspeed,ast2500-video-engine"; 27*4882a593Smuzhiyun reg = <0x1e700000 0x20000>; 28*4882a593Smuzhiyun clocks = <&syscon ASPEED_CLK_GATE_VCLK>, <&syscon ASPEED_CLK_GATE_ECLK>; 29*4882a593Smuzhiyun clock-names = "vclk", "eclk"; 30*4882a593Smuzhiyun resets = <&syscon ASPEED_RESET_VIDEO>; 31*4882a593Smuzhiyun interrupts = <7>; 32*4882a593Smuzhiyun memory-region = <&video_engine_memory>; 33*4882a593Smuzhiyun}; 34