xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-csi.yaml (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2*4882a593Smuzhiyun%YAML 1.2
3*4882a593Smuzhiyun---
4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/media/allwinner,sun4i-a10-csi.yaml#
5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml#
6*4882a593Smuzhiyun
7*4882a593Smuzhiyuntitle: Allwinner A10 CMOS Sensor Interface (CSI) Device Tree Bindings
8*4882a593Smuzhiyun
9*4882a593Smuzhiyunmaintainers:
10*4882a593Smuzhiyun  - Chen-Yu Tsai <wens@csie.org>
11*4882a593Smuzhiyun  - Maxime Ripard <mripard@kernel.org>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyundescription: |-
14*4882a593Smuzhiyun  The Allwinner A10 and later has a CMOS Sensor Interface to retrieve
15*4882a593Smuzhiyun  frames from a parallel or BT656 sensor.
16*4882a593Smuzhiyun
17*4882a593Smuzhiyunproperties:
18*4882a593Smuzhiyun  compatible:
19*4882a593Smuzhiyun    oneOf:
20*4882a593Smuzhiyun      - const: allwinner,sun4i-a10-csi1
21*4882a593Smuzhiyun      - const: allwinner,sun7i-a20-csi0
22*4882a593Smuzhiyun      - items:
23*4882a593Smuzhiyun          - const: allwinner,sun7i-a20-csi1
24*4882a593Smuzhiyun          - const: allwinner,sun4i-a10-csi1
25*4882a593Smuzhiyun      - items:
26*4882a593Smuzhiyun          - const: allwinner,sun8i-r40-csi0
27*4882a593Smuzhiyun          - const: allwinner,sun7i-a20-csi0
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun  reg:
30*4882a593Smuzhiyun    maxItems: 1
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun  interrupts:
33*4882a593Smuzhiyun    maxItems: 1
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun  clocks:
36*4882a593Smuzhiyun    oneOf:
37*4882a593Smuzhiyun      - items:
38*4882a593Smuzhiyun          - description: The CSI interface clock
39*4882a593Smuzhiyun          - description: The CSI DRAM clock
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun      - items:
42*4882a593Smuzhiyun          - description: The CSI interface clock
43*4882a593Smuzhiyun          - description: The CSI ISP clock
44*4882a593Smuzhiyun          - description: The CSI DRAM clock
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun  clock-names:
47*4882a593Smuzhiyun    oneOf:
48*4882a593Smuzhiyun      - items:
49*4882a593Smuzhiyun          - const: bus
50*4882a593Smuzhiyun          - const: ram
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun      - items:
53*4882a593Smuzhiyun          - const: bus
54*4882a593Smuzhiyun          - const: isp
55*4882a593Smuzhiyun          - const: ram
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun  resets:
58*4882a593Smuzhiyun    maxItems: 1
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun  # FIXME: This should be made required eventually once every SoC will
61*4882a593Smuzhiyun  # have the MBUS declared.
62*4882a593Smuzhiyun  interconnects:
63*4882a593Smuzhiyun    maxItems: 1
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun  # FIXME: This should be made required eventually once every SoC will
66*4882a593Smuzhiyun  # have the MBUS declared.
67*4882a593Smuzhiyun  interconnect-names:
68*4882a593Smuzhiyun    const: dma-mem
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun  # See ./video-interfaces.txt for details
71*4882a593Smuzhiyun  port:
72*4882a593Smuzhiyun    type: object
73*4882a593Smuzhiyun    additionalProperties: false
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun    properties:
76*4882a593Smuzhiyun      endpoint:
77*4882a593Smuzhiyun        type: object
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun        properties:
80*4882a593Smuzhiyun          bus-width:
81*4882a593Smuzhiyun            enum: [8, 16]
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun          data-active: true
84*4882a593Smuzhiyun          hsync-active: true
85*4882a593Smuzhiyun          pclk-sample: true
86*4882a593Smuzhiyun          remote-endpoint: true
87*4882a593Smuzhiyun          vsync-active: true
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun        required:
90*4882a593Smuzhiyun          - bus-width
91*4882a593Smuzhiyun          - data-active
92*4882a593Smuzhiyun          - hsync-active
93*4882a593Smuzhiyun          - pclk-sample
94*4882a593Smuzhiyun          - remote-endpoint
95*4882a593Smuzhiyun          - vsync-active
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun    required:
98*4882a593Smuzhiyun      - endpoint
99*4882a593Smuzhiyun
100*4882a593Smuzhiyunrequired:
101*4882a593Smuzhiyun  - compatible
102*4882a593Smuzhiyun  - reg
103*4882a593Smuzhiyun  - interrupts
104*4882a593Smuzhiyun  - clocks
105*4882a593Smuzhiyun
106*4882a593SmuzhiyunadditionalProperties: false
107*4882a593Smuzhiyun
108*4882a593Smuzhiyunexamples:
109*4882a593Smuzhiyun  - |
110*4882a593Smuzhiyun    #include <dt-bindings/interrupt-controller/arm-gic.h>
111*4882a593Smuzhiyun    #include <dt-bindings/clock/sun7i-a20-ccu.h>
112*4882a593Smuzhiyun    #include <dt-bindings/reset/sun4i-a10-ccu.h>
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun    csi0: csi@1c09000 {
115*4882a593Smuzhiyun        compatible = "allwinner,sun7i-a20-csi0";
116*4882a593Smuzhiyun        reg = <0x01c09000 0x1000>;
117*4882a593Smuzhiyun        interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
118*4882a593Smuzhiyun        clocks = <&ccu CLK_AHB_CSI0>, <&ccu CLK_CSI_SCLK>, <&ccu CLK_DRAM_CSI0>;
119*4882a593Smuzhiyun        clock-names = "bus", "isp", "ram";
120*4882a593Smuzhiyun        resets = <&ccu RST_CSI0>;
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun        port {
123*4882a593Smuzhiyun            csi_from_ov5640: endpoint {
124*4882a593Smuzhiyun                remote-endpoint = <&ov5640_to_csi>;
125*4882a593Smuzhiyun                bus-width = <8>;
126*4882a593Smuzhiyun                hsync-active = <1>; /* Active high */
127*4882a593Smuzhiyun                vsync-active = <0>; /* Active low */
128*4882a593Smuzhiyun                data-active = <1>;  /* Active high */
129*4882a593Smuzhiyun                pclk-sample = <1>;  /* Rising */
130*4882a593Smuzhiyun            };
131*4882a593Smuzhiyun        };
132*4882a593Smuzhiyun    };
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun...
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