1*4882a593SmuzhiyunThe APM X-Gene SLIMpro mailbox is used to communicate messages between 2*4882a593Smuzhiyunthe ARM64 processors and the Cortex M3 (dubbed SLIMpro). It uses a simple 3*4882a593Smuzhiyuninterrupt based door bell mechanism and can exchange simple messages using the 4*4882a593Smuzhiyuninternal registers. 5*4882a593Smuzhiyun 6*4882a593SmuzhiyunThere are total of 8 interrupts in this mailbox. Each used for an individual 7*4882a593Smuzhiyundoor bell (or mailbox channel). 8*4882a593Smuzhiyun 9*4882a593SmuzhiyunRequired properties: 10*4882a593Smuzhiyun- compatible: Should be as "apm,xgene-slimpro-mbox". 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun- reg: Contains the mailbox register address range. 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun- interrupts: 8 interrupts must be from 0 to 7, interrupt 0 define the 15*4882a593Smuzhiyun the interrupt for mailbox channel 0 and interrupt 1 for 16*4882a593Smuzhiyun mailbox channel 1 and so likewise for the reminder. 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun- #mbox-cells: only one to specify the mailbox channel number. 19*4882a593Smuzhiyun 20*4882a593SmuzhiyunExample: 21*4882a593Smuzhiyun 22*4882a593SmuzhiyunMailbox Node: 23*4882a593Smuzhiyun mailbox: mailbox@10540000 { 24*4882a593Smuzhiyun compatible = "apm,xgene-slimpro-mbox"; 25*4882a593Smuzhiyun reg = <0x0 0x10540000 0x0 0xa000>; 26*4882a593Smuzhiyun #mbox-cells = <1>; 27*4882a593Smuzhiyun interrupts = <0x0 0x0 0x4>, 28*4882a593Smuzhiyun <0x0 0x1 0x4>, 29*4882a593Smuzhiyun <0x0 0x2 0x4>, 30*4882a593Smuzhiyun <0x0 0x3 0x4>, 31*4882a593Smuzhiyun <0x0 0x4 0x4>, 32*4882a593Smuzhiyun <0x0 0x5 0x4>, 33*4882a593Smuzhiyun <0x0 0x6 0x4>, 34*4882a593Smuzhiyun <0x0 0x7 0x4>, 35*4882a593Smuzhiyun }; 36