1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: "http://devicetree.org/schemas/mailbox/sprd-mailbox.yaml#" 5*4882a593Smuzhiyun$schema: "http://devicetree.org/meta-schemas/core.yaml#" 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Spreadtrum mailbox controller bindings 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Orson Zhai <orsonzhai@gmail.com> 11*4882a593Smuzhiyun - Baolin Wang <baolin.wang7@gmail.com> 12*4882a593Smuzhiyun - Chunyan Zhang <zhang.lyra@gmail.com> 13*4882a593Smuzhiyun 14*4882a593Smuzhiyunproperties: 15*4882a593Smuzhiyun compatible: 16*4882a593Smuzhiyun enum: 17*4882a593Smuzhiyun - sprd,sc9860-mailbox 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun reg: 20*4882a593Smuzhiyun items: 21*4882a593Smuzhiyun - description: inbox registers' base address 22*4882a593Smuzhiyun - description: outbox registers' base address 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun interrupts: 25*4882a593Smuzhiyun items: 26*4882a593Smuzhiyun - description: inbox interrupt 27*4882a593Smuzhiyun - description: outbox interrupt 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun clocks: 30*4882a593Smuzhiyun maxItems: 1 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun clock-names: 33*4882a593Smuzhiyun items: 34*4882a593Smuzhiyun - const: enable 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun "#mbox-cells": 37*4882a593Smuzhiyun const: 1 38*4882a593Smuzhiyun 39*4882a593Smuzhiyunrequired: 40*4882a593Smuzhiyun - compatible 41*4882a593Smuzhiyun - reg 42*4882a593Smuzhiyun - interrupts 43*4882a593Smuzhiyun - "#mbox-cells" 44*4882a593Smuzhiyun - clocks 45*4882a593Smuzhiyun - clock-names 46*4882a593Smuzhiyun 47*4882a593SmuzhiyunadditionalProperties: false 48*4882a593Smuzhiyun 49*4882a593Smuzhiyunexamples: 50*4882a593Smuzhiyun - | 51*4882a593Smuzhiyun #include <dt-bindings/interrupt-controller/arm-gic.h> 52*4882a593Smuzhiyun mailbox: mailbox@400a0000 { 53*4882a593Smuzhiyun compatible = "sprd,sc9860-mailbox"; 54*4882a593Smuzhiyun reg = <0x400a0000 0x8000>, <0x400a8000 0x8000>; 55*4882a593Smuzhiyun #mbox-cells = <1>; 56*4882a593Smuzhiyun clock-names = "enable"; 57*4882a593Smuzhiyun clocks = <&aon_gate 53>; 58*4882a593Smuzhiyun interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; 59*4882a593Smuzhiyun }; 60*4882a593Smuzhiyun... 61