1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: "http://devicetree.org/schemas/mailbox/qcom,apcs-kpss-global.yaml#" 5*4882a593Smuzhiyun$schema: "http://devicetree.org/meta-schemas/core.yaml#" 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Qualcomm APCS global block bindings 8*4882a593Smuzhiyun 9*4882a593Smuzhiyundescription: 10*4882a593Smuzhiyun This binding describes the APCS "global" block found in various Qualcomm 11*4882a593Smuzhiyun platforms. 12*4882a593Smuzhiyun 13*4882a593Smuzhiyunmaintainers: 14*4882a593Smuzhiyun - Sivaprakash Murugesan <sivaprak@codeaurora.org> 15*4882a593Smuzhiyun 16*4882a593Smuzhiyunproperties: 17*4882a593Smuzhiyun compatible: 18*4882a593Smuzhiyun enum: 19*4882a593Smuzhiyun - qcom,ipq6018-apcs-apps-global 20*4882a593Smuzhiyun - qcom,ipq8074-apcs-apps-global 21*4882a593Smuzhiyun - qcom,msm8916-apcs-kpss-global 22*4882a593Smuzhiyun - qcom,msm8994-apcs-kpss-global 23*4882a593Smuzhiyun - qcom,msm8996-apcs-hmss-global 24*4882a593Smuzhiyun - qcom,msm8998-apcs-hmss-global 25*4882a593Smuzhiyun - qcom,qcs404-apcs-apps-global 26*4882a593Smuzhiyun - qcom,sc7180-apss-shared 27*4882a593Smuzhiyun - qcom,sdm660-apcs-hmss-global 28*4882a593Smuzhiyun - qcom,sdm845-apss-shared 29*4882a593Smuzhiyun - qcom,sm8150-apss-shared 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun reg: 32*4882a593Smuzhiyun maxItems: 1 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun clocks: 35*4882a593Smuzhiyun description: phandles to the parent clocks of the clock driver 36*4882a593Smuzhiyun items: 37*4882a593Smuzhiyun - description: primary pll parent of the clock driver 38*4882a593Smuzhiyun - description: auxiliary parent 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun '#mbox-cells': 41*4882a593Smuzhiyun const: 1 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun '#clock-cells': 44*4882a593Smuzhiyun const: 0 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun clock-names: 47*4882a593Smuzhiyun items: 48*4882a593Smuzhiyun - const: pll 49*4882a593Smuzhiyun - const: aux 50*4882a593Smuzhiyun 51*4882a593Smuzhiyunrequired: 52*4882a593Smuzhiyun - compatible 53*4882a593Smuzhiyun - reg 54*4882a593Smuzhiyun - '#mbox-cells' 55*4882a593Smuzhiyun 56*4882a593SmuzhiyunadditionalProperties: false 57*4882a593Smuzhiyun 58*4882a593Smuzhiyunexamples: 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun # Example apcs with msm8996 61*4882a593Smuzhiyun - | 62*4882a593Smuzhiyun #include <dt-bindings/interrupt-controller/arm-gic.h> 63*4882a593Smuzhiyun apcs_glb: mailbox@9820000 { 64*4882a593Smuzhiyun compatible = "qcom,msm8996-apcs-hmss-global"; 65*4882a593Smuzhiyun reg = <0x9820000 0x1000>; 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun #mbox-cells = <1>; 68*4882a593Smuzhiyun }; 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun rpm-glink { 71*4882a593Smuzhiyun compatible = "qcom,glink-rpm"; 72*4882a593Smuzhiyun interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>; 73*4882a593Smuzhiyun qcom,rpm-msg-ram = <&rpm_msg_ram>; 74*4882a593Smuzhiyun mboxes = <&apcs_glb 0>; 75*4882a593Smuzhiyun mbox-names = "rpm_hlos"; 76*4882a593Smuzhiyun }; 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun # Example apcs with qcs404 79*4882a593Smuzhiyun - | 80*4882a593Smuzhiyun #define GCC_APSS_AHB_CLK_SRC 1 81*4882a593Smuzhiyun #define GCC_GPLL0_AO_OUT_MAIN 123 82*4882a593Smuzhiyun apcs: mailbox@b011000 { 83*4882a593Smuzhiyun compatible = "qcom,qcs404-apcs-apps-global"; 84*4882a593Smuzhiyun reg = <0x0b011000 0x1000>; 85*4882a593Smuzhiyun #mbox-cells = <1>; 86*4882a593Smuzhiyun clocks = <&apcs_hfpll>, <&gcc GCC_GPLL0_AO_OUT_MAIN>; 87*4882a593Smuzhiyun clock-names = "pll", "aux"; 88*4882a593Smuzhiyun #clock-cells = <0>; 89*4882a593Smuzhiyun }; 90