xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mailbox/arm,mhu.yaml (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*4882a593Smuzhiyun%YAML 1.2
3*4882a593Smuzhiyun---
4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/mailbox/arm,mhu.yaml#
5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml#
6*4882a593Smuzhiyun
7*4882a593Smuzhiyuntitle: ARM MHU Mailbox Controller
8*4882a593Smuzhiyun
9*4882a593Smuzhiyunmaintainers:
10*4882a593Smuzhiyun  - Jassi Brar <jaswinder.singh@linaro.org>
11*4882a593Smuzhiyun
12*4882a593Smuzhiyundescription: |
13*4882a593Smuzhiyun  The ARM's Message-Handling-Unit (MHU) is a mailbox controller that has 3
14*4882a593Smuzhiyun  independent channels/links to communicate with remote processor(s).  MHU links
15*4882a593Smuzhiyun  are hardwired on a platform. A link raises interrupt for any received data.
16*4882a593Smuzhiyun  However, there is no specified way of knowing if the sent data has been read
17*4882a593Smuzhiyun  by the remote. This driver assumes the sender polls STAT register and the
18*4882a593Smuzhiyun  remote clears it after having read the data.  The last channel is specified to
19*4882a593Smuzhiyun  be a 'Secure' resource, hence can't be used by Linux running NS.
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun  The MHU hardware also allows operations in doorbell mode. The MHU drives the
22*4882a593Smuzhiyun  interrupt signal using a 32-bit register, with all 32-bits logically ORed
23*4882a593Smuzhiyun  together. It provides a set of registers to enable software to set, clear and
24*4882a593Smuzhiyun  check the status of each of the bits of this register independently. The use
25*4882a593Smuzhiyun  of 32 bits per interrupt line enables software to provide more information
26*4882a593Smuzhiyun  about the source of the interrupt. For example, each bit of the register can
27*4882a593Smuzhiyun  be associated with a type of event that can contribute to raising the
28*4882a593Smuzhiyun  interrupt. Each of the 32-bits can be used as "doorbell" to alert the remote
29*4882a593Smuzhiyun  processor.
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun# We need a select here so we don't match all nodes with 'arm,primecell'
32*4882a593Smuzhiyunselect:
33*4882a593Smuzhiyun  properties:
34*4882a593Smuzhiyun    compatible:
35*4882a593Smuzhiyun      contains:
36*4882a593Smuzhiyun        enum:
37*4882a593Smuzhiyun          - arm,mhu
38*4882a593Smuzhiyun          - arm,mhu-doorbell
39*4882a593Smuzhiyun  required:
40*4882a593Smuzhiyun    - compatible
41*4882a593Smuzhiyun
42*4882a593Smuzhiyunproperties:
43*4882a593Smuzhiyun  compatible:
44*4882a593Smuzhiyun    oneOf:
45*4882a593Smuzhiyun      - description: Data transfer mode
46*4882a593Smuzhiyun        items:
47*4882a593Smuzhiyun          - const: arm,mhu
48*4882a593Smuzhiyun          - const: arm,primecell
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun      - description: Doorbell mode
51*4882a593Smuzhiyun        items:
52*4882a593Smuzhiyun          - const: arm,mhu-doorbell
53*4882a593Smuzhiyun          - const: arm,primecell
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun  reg:
57*4882a593Smuzhiyun    maxItems: 1
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun  interrupts:
60*4882a593Smuzhiyun    items:
61*4882a593Smuzhiyun      - description: low-priority non-secure
62*4882a593Smuzhiyun      - description: high-priority non-secure
63*4882a593Smuzhiyun      - description: Secure
64*4882a593Smuzhiyun    maxItems: 3
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun  clocks:
67*4882a593Smuzhiyun    maxItems: 1
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun  clock-names:
70*4882a593Smuzhiyun    items:
71*4882a593Smuzhiyun      - const: apb_pclk
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun  '#mbox-cells':
74*4882a593Smuzhiyun    description: |
75*4882a593Smuzhiyun      Set to 1 in data transfer mode and represents index of the channel.
76*4882a593Smuzhiyun      Set to 2 in doorbell mode and represents index of the channel and doorbell
77*4882a593Smuzhiyun      number.
78*4882a593Smuzhiyun    enum: [ 1, 2 ]
79*4882a593Smuzhiyun
80*4882a593Smuzhiyunrequired:
81*4882a593Smuzhiyun  - compatible
82*4882a593Smuzhiyun  - reg
83*4882a593Smuzhiyun  - interrupts
84*4882a593Smuzhiyun  - '#mbox-cells'
85*4882a593Smuzhiyun
86*4882a593SmuzhiyunadditionalProperties: false
87*4882a593Smuzhiyun
88*4882a593Smuzhiyunexamples:
89*4882a593Smuzhiyun  # Data transfer mode.
90*4882a593Smuzhiyun  - |
91*4882a593Smuzhiyun    soc {
92*4882a593Smuzhiyun        #address-cells = <2>;
93*4882a593Smuzhiyun        #size-cells = <2>;
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun        mhuA: mailbox@2b1f0000 {
96*4882a593Smuzhiyun            #mbox-cells = <1>;
97*4882a593Smuzhiyun            compatible = "arm,mhu", "arm,primecell";
98*4882a593Smuzhiyun            reg = <0 0x2b1f0000 0 0x1000>;
99*4882a593Smuzhiyun            interrupts = <0 36 4>, /* LP-NonSecure */
100*4882a593Smuzhiyun                         <0 35 4>, /* HP-NonSecure */
101*4882a593Smuzhiyun                         <0 37 4>; /* Secure */
102*4882a593Smuzhiyun            clocks = <&clock 0 2 1>;
103*4882a593Smuzhiyun            clock-names = "apb_pclk";
104*4882a593Smuzhiyun        };
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun        mhu_client_scb: scb@2e000000 {
107*4882a593Smuzhiyun            compatible = "fujitsu,mb86s70-scb-1.0";
108*4882a593Smuzhiyun            reg = <0 0x2e000000 0 0x4000>;
109*4882a593Smuzhiyun            mboxes = <&mhuA 1>; /* HP-NonSecure */
110*4882a593Smuzhiyun        };
111*4882a593Smuzhiyun    };
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun  # Doorbell mode.
114*4882a593Smuzhiyun  - |
115*4882a593Smuzhiyun    soc {
116*4882a593Smuzhiyun        #address-cells = <2>;
117*4882a593Smuzhiyun        #size-cells = <2>;
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun        mhuB: mailbox@2b2f0000 {
120*4882a593Smuzhiyun            #mbox-cells = <2>;
121*4882a593Smuzhiyun            compatible = "arm,mhu-doorbell", "arm,primecell";
122*4882a593Smuzhiyun            reg = <0 0x2b2f0000 0 0x1000>;
123*4882a593Smuzhiyun            interrupts = <0 36 4>, /* LP-NonSecure */
124*4882a593Smuzhiyun                         <0 35 4>, /* HP-NonSecure */
125*4882a593Smuzhiyun                         <0 37 4>; /* Secure */
126*4882a593Smuzhiyun            clocks = <&clock 0 2 1>;
127*4882a593Smuzhiyun            clock-names = "apb_pclk";
128*4882a593Smuzhiyun        };
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun        mhu_client_scpi: scpi@2f000000 {
131*4882a593Smuzhiyun            compatible = "arm,scpi";
132*4882a593Smuzhiyun            reg = <0 0x2f000000 0 0x200>;
133*4882a593Smuzhiyun            mboxes = <&mhuB 1 4>; /* HP-NonSecure, 5th doorbell */
134*4882a593Smuzhiyun        };
135*4882a593Smuzhiyun    };
136