1*4882a593SmuzhiyunROCKCHIP rk32 IOMMU H/W 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun- compatible : "iommu,iep_mmu" 5*4882a593Smuzhiyun- reg : Should contain address and length for each 6*4882a593Smuzhiyun of the IOMMU register blocks. 7*4882a593Smuzhiyun- interrupts : Should contain irq type,irq no,and level type 8*4882a593Smuzhiyun 9*4882a593SmuzhiyunExample: 10*4882a593Smuzhiyun iep_mmu { 11*4882a593Smuzhiyun dbgname = "iep"; 12*4882a593Smuzhiyun compatible = "iommu,iep_mmu"; 13*4882a593Smuzhiyun reg = <0xff900800 0x100>; 14*4882a593Smuzhiyun interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 15*4882a593Smuzhiyun interrupt-names = "iep_mmu"; 16*4882a593Smuzhiyun }; 17