xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/iommu/allwinner,sun50i-h6-iommu.yaml (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2*4882a593Smuzhiyun%YAML 1.2
3*4882a593Smuzhiyun---
4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/iommu/allwinner,sun50i-h6-iommu.yaml#
5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml#
6*4882a593Smuzhiyun
7*4882a593Smuzhiyuntitle: Allwinner H6 IOMMU Device Tree Bindings
8*4882a593Smuzhiyun
9*4882a593Smuzhiyunmaintainers:
10*4882a593Smuzhiyun  - Chen-Yu Tsai <wens@csie.org>
11*4882a593Smuzhiyun  - Maxime Ripard <mripard@kernel.org>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyunproperties:
14*4882a593Smuzhiyun  "#iommu-cells":
15*4882a593Smuzhiyun    const: 1
16*4882a593Smuzhiyun    description:
17*4882a593Smuzhiyun      The content of the cell is the master ID.
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun  compatible:
20*4882a593Smuzhiyun    const: allwinner,sun50i-h6-iommu
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun  reg:
23*4882a593Smuzhiyun    maxItems: 1
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun  interrupts:
26*4882a593Smuzhiyun    maxItems: 1
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun  clocks:
29*4882a593Smuzhiyun    maxItems: 1
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun  resets:
32*4882a593Smuzhiyun    maxItems: 1
33*4882a593Smuzhiyun
34*4882a593Smuzhiyunrequired:
35*4882a593Smuzhiyun  - "#iommu-cells"
36*4882a593Smuzhiyun  - compatible
37*4882a593Smuzhiyun  - reg
38*4882a593Smuzhiyun  - interrupts
39*4882a593Smuzhiyun  - clocks
40*4882a593Smuzhiyun  - resets
41*4882a593Smuzhiyun
42*4882a593SmuzhiyunadditionalProperties: false
43*4882a593Smuzhiyun
44*4882a593Smuzhiyunexamples:
45*4882a593Smuzhiyun  - |
46*4882a593Smuzhiyun      #include <dt-bindings/interrupt-controller/arm-gic.h>
47*4882a593Smuzhiyun      #include <dt-bindings/interrupt-controller/irq.h>
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun      #include <dt-bindings/clock/sun50i-h6-ccu.h>
50*4882a593Smuzhiyun      #include <dt-bindings/reset/sun50i-h6-ccu.h>
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun      iommu: iommu@30f0000 {
53*4882a593Smuzhiyun          compatible = "allwinner,sun50i-h6-iommu";
54*4882a593Smuzhiyun          reg = <0x030f0000 0x10000>;
55*4882a593Smuzhiyun          interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
56*4882a593Smuzhiyun          clocks = <&ccu CLK_BUS_IOMMU>;
57*4882a593Smuzhiyun          resets = <&ccu RST_BUS_IOMMU>;
58*4882a593Smuzhiyun          #iommu-cells = <1>;
59*4882a593Smuzhiyun      };
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun...
62