1*4882a593Smuzhiyun* OMAP Interrupt Controller 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunOMAP2/3 are using a TI interrupt controller that can support several 4*4882a593Smuzhiyunconfigurable number of interrupts. 5*4882a593Smuzhiyun 6*4882a593SmuzhiyunMain node required properties: 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun- compatible : should be: 9*4882a593Smuzhiyun "ti,omap2-intc" 10*4882a593Smuzhiyun- interrupt-controller : Identifies the node as an interrupt controller 11*4882a593Smuzhiyun- #interrupt-cells : Specifies the number of cells needed to encode an 12*4882a593Smuzhiyun interrupt source. The type shall be a <u32> and the value shall be 1. 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun The cell contains the interrupt number in the range [0-128]. 15*4882a593Smuzhiyun- ti,intc-size: Number of interrupts handled by the interrupt controller. 16*4882a593Smuzhiyun- reg: physical base address and size of the intc registers map. 17*4882a593Smuzhiyun 18*4882a593SmuzhiyunExample: 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun intc: interrupt-controller@1 { 21*4882a593Smuzhiyun compatible = "ti,omap2-intc"; 22*4882a593Smuzhiyun interrupt-controller; 23*4882a593Smuzhiyun #interrupt-cells = <1>; 24*4882a593Smuzhiyun ti,intc-size = <96>; 25*4882a593Smuzhiyun reg = <0x48200000 0x1000>; 26*4882a593Smuzhiyun }; 27*4882a593Smuzhiyun 28