1*4882a593SmuzhiyunTS-4800 FPGA interrupt controller
2*4882a593Smuzhiyun
3*4882a593SmuzhiyunTS-4800 FPGA has an internal interrupt controller. When one of the
4*4882a593Smuzhiyuninterrupts is triggered, the SoC is notified, usually using a GPIO as
5*4882a593Smuzhiyunparent interrupt source.
6*4882a593Smuzhiyun
7*4882a593SmuzhiyunRequired properties:
8*4882a593Smuzhiyun- compatible: should be "technologic,ts4800-irqc"
9*4882a593Smuzhiyun- interrupt-controller: identifies the node as an interrupt controller
10*4882a593Smuzhiyun- reg: physical base address of the controller and length of memory mapped
11*4882a593Smuzhiyun  region
12*4882a593Smuzhiyun- #interrupt-cells: specifies the number of cells needed to encode an interrupt
13*4882a593Smuzhiyun  source, should be 1.
14*4882a593Smuzhiyun- interrupts: specifies the interrupt line in the interrupt-parent controller
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