1*4882a593Smuzhiyun* ARC700 incore Interrupt Controller
2*4882a593Smuzhiyun
3*4882a593Smuzhiyun  The core interrupt controller provides 32 prioritised interrupts (2 levels)
4*4882a593Smuzhiyun  to ARC700 core.
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6*4882a593SmuzhiyunProperties:
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8*4882a593Smuzhiyun- compatible: "snps,arc700-intc"
9*4882a593Smuzhiyun- interrupt-controller: This is an interrupt controller.
10*4882a593Smuzhiyun- #interrupt-cells: Must be <1>.
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun  Single Cell "interrupts" property of a device specifies the IRQ number
13*4882a593Smuzhiyun  between 0 to 31
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun  intc accessed via the special ARC AUX register interface, hence "reg" property
16*4882a593Smuzhiyun  is not specified.
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18*4882a593SmuzhiyunExample:
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20*4882a593Smuzhiyun	intc: interrupt-controller {
21*4882a593Smuzhiyun		compatible = "snps,arc700-intc";
22*4882a593Smuzhiyun		interrupt-controller;
23*4882a593Smuzhiyun		#interrupt-cells = <1>;
24*4882a593Smuzhiyun	};
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