1*4882a593SmuzhiyunSynopsys DesignWare APB interrupt controller (dw_apb_ictl) 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunSynopsys DesignWare provides interrupt controller IP for APB known as 4*4882a593Smuzhiyundw_apb_ictl. The IP is used as secondary interrupt controller in some SoCs with 5*4882a593SmuzhiyunAPB bus, e.g. Marvell Armada 1500. It can also be used as primary interrupt 6*4882a593Smuzhiyuncontroller in some SoCs, e.g. Hisilicon SD5203. 7*4882a593Smuzhiyun 8*4882a593SmuzhiyunRequired properties: 9*4882a593Smuzhiyun- compatible: shall be "snps,dw-apb-ictl" 10*4882a593Smuzhiyun- reg: physical base address of the controller and length of memory mapped 11*4882a593Smuzhiyun region starting with ENABLE_LOW register 12*4882a593Smuzhiyun- interrupt-controller: identifies the node as an interrupt controller 13*4882a593Smuzhiyun- #interrupt-cells: number of cells to encode an interrupt-specifier, shall be 1 14*4882a593Smuzhiyun 15*4882a593SmuzhiyunAdditional required property when it's used as secondary interrupt controller: 16*4882a593Smuzhiyun- interrupts: interrupt reference to primary interrupt controller 17*4882a593Smuzhiyun 18*4882a593SmuzhiyunThe interrupt sources map to the corresponding bits in the interrupt 19*4882a593Smuzhiyunregisters, i.e. 20*4882a593Smuzhiyun- 0 maps to bit 0 of low interrupts, 21*4882a593Smuzhiyun- 1 maps to bit 1 of low interrupts, 22*4882a593Smuzhiyun- 32 maps to bit 0 of high interrupts, 23*4882a593Smuzhiyun- 33 maps to bit 1 of high interrupts, 24*4882a593Smuzhiyun- (optional) fast interrupts start at 64. 25*4882a593Smuzhiyun 26*4882a593SmuzhiyunExample: 27*4882a593Smuzhiyun /* dw_apb_ictl is used as secondary interrupt controller */ 28*4882a593Smuzhiyun aic: interrupt-controller@3000 { 29*4882a593Smuzhiyun compatible = "snps,dw-apb-ictl"; 30*4882a593Smuzhiyun reg = <0x3000 0xc00>; 31*4882a593Smuzhiyun interrupt-controller; 32*4882a593Smuzhiyun #interrupt-cells = <1>; 33*4882a593Smuzhiyun interrupt-parent = <&gic>; 34*4882a593Smuzhiyun interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun /* dw_apb_ictl is used as primary interrupt controller */ 38*4882a593Smuzhiyun vic: interrupt-controller@10130000 { 39*4882a593Smuzhiyun compatible = "snps,dw-apb-ictl"; 40*4882a593Smuzhiyun reg = <0x10130000 0x1000>; 41*4882a593Smuzhiyun interrupt-controller; 42*4882a593Smuzhiyun #interrupt-cells = <1>; 43*4882a593Smuzhiyun }; 44