1*4882a593SmuzhiyunSamsung S3C24XX Interrupt Controllers
2*4882a593Smuzhiyun
3*4882a593SmuzhiyunThe S3C24XX SoCs contain a custom set of interrupt controllers providing a
4*4882a593Smuzhiyunvarying number of interrupt sources. The set consists of a main- and sub-
5*4882a593Smuzhiyuncontroller and on newer SoCs even a second main controller.
6*4882a593Smuzhiyun
7*4882a593SmuzhiyunRequired properties:
8*4882a593Smuzhiyun- compatible: Compatible property value should be "samsung,s3c2410-irq"
9*4882a593Smuzhiyun  for machines before s3c2416 and "samsung,s3c2416-irq" for s3c2416 and later.
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun- reg: Physical base address of the controller and length of memory mapped
12*4882a593Smuzhiyun  region.
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun- interrupt-controller : Identifies the node as an interrupt controller
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun- #interrupt-cells : Specifies the number of cells needed to encode an
17*4882a593Smuzhiyun  interrupt source. The value shall be 4 and interrupt descriptor shall
18*4882a593Smuzhiyun  have the following format:
19*4882a593Smuzhiyun      <ctrl_num parent_irq ctrl_irq type>
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun  ctrl_num contains the controller to use:
22*4882a593Smuzhiyun      - 0 ... main controller
23*4882a593Smuzhiyun      - 1 ... sub controller
24*4882a593Smuzhiyun      - 2 ... second main controller on s3c2416 and s3c2450
25*4882a593Smuzhiyun  parent_irq contains the parent bit in the main controller and will be
26*4882a593Smuzhiyun             ignored in main controllers
27*4882a593Smuzhiyun  ctrl_irq contains the interrupt bit of the controller
28*4882a593Smuzhiyun  type contains the trigger type to use
29*4882a593Smuzhiyun
30*4882a593SmuzhiyunExample:
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun	interrupt-controller@4a000000 {
33*4882a593Smuzhiyun		compatible = "samsung,s3c2410-irq";
34*4882a593Smuzhiyun		reg = <0x4a000000 0x100>;
35*4882a593Smuzhiyun		interrupt-controller;
36*4882a593Smuzhiyun		#interrupt-cells=<4>;
37*4882a593Smuzhiyun	};
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun	[...]
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun	serial@50000000 {
42*4882a593Smuzhiyun		compatible = "samsung,s3c2410-uart";
43*4882a593Smuzhiyun		reg = <0x50000000 0x4000>;
44*4882a593Smuzhiyun		interrupt-parent = <&subintc>;
45*4882a593Smuzhiyun		interrupts = <1 28 0 4>, <1 28 1 4>;
46*4882a593Smuzhiyun	};
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun	rtc@57000000 {
49*4882a593Smuzhiyun		compatible = "samsung,s3c2410-rtc";
50*4882a593Smuzhiyun		reg = <0x57000000 0x100>;
51*4882a593Smuzhiyun		interrupt-parent = <&intc>;
52*4882a593Smuzhiyun		interrupts = <0 30 0 3>, <0 8 0 3>;
53*4882a593Smuzhiyun	};
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