1*4882a593SmuzhiyunMediaTek sysirq 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunMediaTek SOCs sysirq support controllable irq inverter for each GIC SPI 4*4882a593Smuzhiyuninterrupt. 5*4882a593Smuzhiyun 6*4882a593SmuzhiyunRequired properties: 7*4882a593Smuzhiyun- compatible: should be 8*4882a593Smuzhiyun "mediatek,mt8516-sysirq", "mediatek,mt6577-sysirq": for MT8516 9*4882a593Smuzhiyun "mediatek,mt8183-sysirq", "mediatek,mt6577-sysirq": for MT8183 10*4882a593Smuzhiyun "mediatek,mt8173-sysirq", "mediatek,mt6577-sysirq": for MT8173 11*4882a593Smuzhiyun "mediatek,mt8135-sysirq", "mediatek,mt6577-sysirq": for MT8135 12*4882a593Smuzhiyun "mediatek,mt8127-sysirq", "mediatek,mt6577-sysirq": for MT8127 13*4882a593Smuzhiyun "mediatek,mt7622-sysirq", "mediatek,mt6577-sysirq": for MT7622 14*4882a593Smuzhiyun "mediatek,mt7623-sysirq", "mediatek,mt6577-sysirq": for MT7623 15*4882a593Smuzhiyun "mediatek,mt7629-sysirq", "mediatek,mt6577-sysirq": for MT7629 16*4882a593Smuzhiyun "mediatek,mt6795-sysirq", "mediatek,mt6577-sysirq": for MT6795 17*4882a593Smuzhiyun "mediatek,mt6797-sysirq", "mediatek,mt6577-sysirq": for MT6797 18*4882a593Smuzhiyun "mediatek,mt6779-sysirq", "mediatek,mt6577-sysirq": for MT6779 19*4882a593Smuzhiyun "mediatek,mt6765-sysirq", "mediatek,mt6577-sysirq": for MT6765 20*4882a593Smuzhiyun "mediatek,mt6755-sysirq", "mediatek,mt6577-sysirq": for MT6755 21*4882a593Smuzhiyun "mediatek,mt6592-sysirq", "mediatek,mt6577-sysirq": for MT6592 22*4882a593Smuzhiyun "mediatek,mt6589-sysirq", "mediatek,mt6577-sysirq": for MT6589 23*4882a593Smuzhiyun "mediatek,mt6582-sysirq", "mediatek,mt6577-sysirq": for MT6582 24*4882a593Smuzhiyun "mediatek,mt6580-sysirq", "mediatek,mt6577-sysirq": for MT6580 25*4882a593Smuzhiyun "mediatek,mt6577-sysirq": for MT6577 26*4882a593Smuzhiyun "mediatek,mt2712-sysirq", "mediatek,mt6577-sysirq": for MT2712 27*4882a593Smuzhiyun "mediatek,mt2701-sysirq", "mediatek,mt6577-sysirq": for MT2701 28*4882a593Smuzhiyun- interrupt-controller : Identifies the node as an interrupt controller 29*4882a593Smuzhiyun- #interrupt-cells : Use the same format as specified by GIC in arm,gic.txt. 30*4882a593Smuzhiyun- reg: Physical base address of the intpol registers and length of memory 31*4882a593Smuzhiyun mapped region. Could be multiple bases here. Ex: mt6797 needs 2 reg, others 32*4882a593Smuzhiyun need 1. 33*4882a593Smuzhiyun 34*4882a593SmuzhiyunExample: 35*4882a593Smuzhiyun sysirq: intpol-controller@10200620 { 36*4882a593Smuzhiyun compatible = "mediatek,mt6797-sysirq", 37*4882a593Smuzhiyun "mediatek,mt6577-sysirq"; 38*4882a593Smuzhiyun interrupt-controller; 39*4882a593Smuzhiyun #interrupt-cells = <3>; 40*4882a593Smuzhiyun interrupt-parent = <&gic>; 41*4882a593Smuzhiyun reg = <0 0x10220620 0 0x20>, 42*4882a593Smuzhiyun <0 0x10220690 0 0x10>; 43*4882a593Smuzhiyun }; 44