1*4882a593SmuzhiyunMarvell GICP Controller 2*4882a593Smuzhiyun----------------------- 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunGICP is a Marvell extension of the GIC that allows to trigger GIC SPI 5*4882a593Smuzhiyuninterrupts by doing a memory transaction. It is used by the ICU 6*4882a593Smuzhiyunlocated in the Marvell CP110 to turn wired interrupts inside the CP 7*4882a593Smuzhiyuninto GIC SPI interrupts. 8*4882a593Smuzhiyun 9*4882a593SmuzhiyunRequired properties: 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun- compatible: Must be "marvell,ap806-gicp" 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun- reg: Must be the address and size of the GICP SPI registers 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun- marvell,spi-ranges: tuples of GIC SPI interrupts ranges available 16*4882a593Smuzhiyun for this GICP 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun- msi-controller: indicates that this is an MSI controller 19*4882a593Smuzhiyun 20*4882a593SmuzhiyunExample: 21*4882a593Smuzhiyun 22*4882a593Smuzhiyungicp_spi: gicp-spi@3f0040 { 23*4882a593Smuzhiyun compatible = "marvell,ap806-gicp"; 24*4882a593Smuzhiyun reg = <0x3f0040 0x10>; 25*4882a593Smuzhiyun marvell,spi-ranges = <64 64>, <288 64>; 26*4882a593Smuzhiyun msi-controller; 27*4882a593Smuzhiyun}; 28