1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*4882a593Smuzhiyun%YAML 1.2
3*4882a593Smuzhiyun---
4*4882a593Smuzhiyun$id: "http://devicetree.org/schemas/interrupt-controller/loongson,pch-msi.yaml#"
5*4882a593Smuzhiyun$schema: "http://devicetree.org/meta-schemas/core.yaml#"
6*4882a593Smuzhiyun
7*4882a593Smuzhiyuntitle: Loongson PCH MSI Controller
8*4882a593Smuzhiyun
9*4882a593Smuzhiyunmaintainers:
10*4882a593Smuzhiyun  - Jiaxun Yang <jiaxun.yang@flygoat.com>
11*4882a593Smuzhiyun
12*4882a593Smuzhiyundescription:
13*4882a593Smuzhiyun  This interrupt controller is found in the Loongson LS7A family of PCH for
14*4882a593Smuzhiyun  transforming interrupts from PCIe MSI into HyperTransport vectorized
15*4882a593Smuzhiyun  interrupts.
16*4882a593Smuzhiyun
17*4882a593Smuzhiyunproperties:
18*4882a593Smuzhiyun  compatible:
19*4882a593Smuzhiyun    const: loongson,pch-msi-1.0
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun  reg:
22*4882a593Smuzhiyun    maxItems: 1
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun  loongson,msi-base-vec:
25*4882a593Smuzhiyun    description:
26*4882a593Smuzhiyun      u32 value of the base of parent HyperTransport vector allocated
27*4882a593Smuzhiyun      to PCH MSI.
28*4882a593Smuzhiyun    $ref: "/schemas/types.yaml#/definitions/uint32"
29*4882a593Smuzhiyun    minimum: 0
30*4882a593Smuzhiyun    maximum: 255
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun  loongson,msi-num-vecs:
33*4882a593Smuzhiyun    description:
34*4882a593Smuzhiyun      u32 value of the number of parent HyperTransport vectors allocated
35*4882a593Smuzhiyun      to PCH MSI.
36*4882a593Smuzhiyun    $ref: "/schemas/types.yaml#/definitions/uint32"
37*4882a593Smuzhiyun    minimum: 1
38*4882a593Smuzhiyun    maximum: 256
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun  msi-controller: true
41*4882a593Smuzhiyun
42*4882a593Smuzhiyunrequired:
43*4882a593Smuzhiyun  - compatible
44*4882a593Smuzhiyun  - reg
45*4882a593Smuzhiyun  - msi-controller
46*4882a593Smuzhiyun  - loongson,msi-base-vec
47*4882a593Smuzhiyun  - loongson,msi-num-vecs
48*4882a593Smuzhiyun
49*4882a593SmuzhiyunadditionalProperties: true #fixme
50*4882a593Smuzhiyun
51*4882a593Smuzhiyunexamples:
52*4882a593Smuzhiyun  - |
53*4882a593Smuzhiyun    #include <dt-bindings/interrupt-controller/irq.h>
54*4882a593Smuzhiyun    msi: msi-controller@2ff00000 {
55*4882a593Smuzhiyun      compatible = "loongson,pch-msi-1.0";
56*4882a593Smuzhiyun      reg = <0x2ff00000 0x4>;
57*4882a593Smuzhiyun      msi-controller;
58*4882a593Smuzhiyun      loongson,msi-base-vec = <64>;
59*4882a593Smuzhiyun      loongson,msi-num-vecs = <64>;
60*4882a593Smuzhiyun      interrupt-parent = <&htvec>;
61*4882a593Smuzhiyun    };
62*4882a593Smuzhiyun...
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