1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*4882a593Smuzhiyun%YAML 1.2
3*4882a593Smuzhiyun---
4*4882a593Smuzhiyun$id: "http://devicetree.org/schemas/interrupt-controller/loongson,htpic.yaml#"
5*4882a593Smuzhiyun$schema: "http://devicetree.org/meta-schemas/core.yaml#"
6*4882a593Smuzhiyun
7*4882a593Smuzhiyuntitle: Loongson-3 HyperTransport Interrupt Controller
8*4882a593Smuzhiyun
9*4882a593Smuzhiyunmaintainers:
10*4882a593Smuzhiyun  - Jiaxun Yang <jiaxun.yang@flygoat.com>
11*4882a593Smuzhiyun
12*4882a593SmuzhiyunallOf:
13*4882a593Smuzhiyun  - $ref: /schemas/interrupt-controller.yaml#
14*4882a593Smuzhiyun
15*4882a593Smuzhiyundescription: |
16*4882a593Smuzhiyun  This interrupt controller is found in the Loongson-3 family of chips to transmit
17*4882a593Smuzhiyun  interrupts from PCH PIC connected on HyperTransport bus.
18*4882a593Smuzhiyun
19*4882a593Smuzhiyunproperties:
20*4882a593Smuzhiyun  compatible:
21*4882a593Smuzhiyun    const: loongson,htpic-1.0
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun  reg:
24*4882a593Smuzhiyun    maxItems: 1
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun  interrupts:
27*4882a593Smuzhiyun    minItems: 1
28*4882a593Smuzhiyun    maxItems: 4
29*4882a593Smuzhiyun    description: |
30*4882a593Smuzhiyun      Four parent interrupts that receive chained interrupts.
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun  interrupt-controller: true
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun  '#interrupt-cells':
35*4882a593Smuzhiyun    const: 1
36*4882a593Smuzhiyun
37*4882a593Smuzhiyunrequired:
38*4882a593Smuzhiyun  - compatible
39*4882a593Smuzhiyun  - reg
40*4882a593Smuzhiyun  - interrupts
41*4882a593Smuzhiyun  - interrupt-controller
42*4882a593Smuzhiyun  - '#interrupt-cells'
43*4882a593Smuzhiyun
44*4882a593SmuzhiyununevaluatedProperties: false
45*4882a593Smuzhiyun
46*4882a593Smuzhiyunexamples:
47*4882a593Smuzhiyun  - |
48*4882a593Smuzhiyun    #include <dt-bindings/interrupt-controller/irq.h>
49*4882a593Smuzhiyun    htintc: interrupt-controller@1fb000080 {
50*4882a593Smuzhiyun      compatible = "loongson,htintc-1.0";
51*4882a593Smuzhiyun      reg = <0xfb000080 0x40>;
52*4882a593Smuzhiyun      interrupt-controller;
53*4882a593Smuzhiyun      #interrupt-cells = <1>;
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun      interrupt-parent = <&liointc>;
56*4882a593Smuzhiyun      interrupts = <24 IRQ_TYPE_LEVEL_HIGH>,
57*4882a593Smuzhiyun                    <25 IRQ_TYPE_LEVEL_HIGH>,
58*4882a593Smuzhiyun                    <26 IRQ_TYPE_LEVEL_HIGH>,
59*4882a593Smuzhiyun                    <27 IRQ_TYPE_LEVEL_HIGH>;
60*4882a593Smuzhiyun    };
61*4882a593Smuzhiyun...
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