xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/interrupt-controller/interrupts.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593SmuzhiyunSpecifying interrupt information for devices
2*4882a593Smuzhiyun============================================
3*4882a593Smuzhiyun
4*4882a593Smuzhiyun1) Interrupt client nodes
5*4882a593Smuzhiyun-------------------------
6*4882a593Smuzhiyun
7*4882a593SmuzhiyunNodes that describe devices which generate interrupts must contain an
8*4882a593Smuzhiyun"interrupts" property, an "interrupts-extended" property, or both. If both are
9*4882a593Smuzhiyunpresent, the latter should take precedence; the former may be provided simply
10*4882a593Smuzhiyunfor compatibility with software that does not recognize the latter. These
11*4882a593Smuzhiyunproperties contain a list of interrupt specifiers, one per output interrupt. The
12*4882a593Smuzhiyunformat of the interrupt specifier is determined by the interrupt controller to
13*4882a593Smuzhiyunwhich the interrupts are routed; see section 2 below for details.
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun  Example:
16*4882a593Smuzhiyun	interrupt-parent = <&intc1>;
17*4882a593Smuzhiyun	interrupts = <5 0>, <6 0>;
18*4882a593Smuzhiyun
19*4882a593SmuzhiyunThe "interrupt-parent" property is used to specify the controller to which
20*4882a593Smuzhiyuninterrupts are routed and contains a single phandle referring to the interrupt
21*4882a593Smuzhiyuncontroller node. This property is inherited, so it may be specified in an
22*4882a593Smuzhiyuninterrupt client node or in any of its parent nodes. Interrupts listed in the
23*4882a593Smuzhiyun"interrupts" property are always in reference to the node's interrupt parent.
24*4882a593Smuzhiyun
25*4882a593SmuzhiyunThe "interrupts-extended" property is a special form; useful when a node needs
26*4882a593Smuzhiyunto reference multiple interrupt parents or a different interrupt parent than
27*4882a593Smuzhiyunthe inherited one. Each entry in this property contains both the parent phandle
28*4882a593Smuzhiyunand the interrupt specifier.
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun  Example:
31*4882a593Smuzhiyun	interrupts-extended = <&intc1 5 1>, <&intc2 1 0>;
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun2) Interrupt controller nodes
34*4882a593Smuzhiyun-----------------------------
35*4882a593Smuzhiyun
36*4882a593SmuzhiyunA device is marked as an interrupt controller with the "interrupt-controller"
37*4882a593Smuzhiyunproperty. This is a empty, boolean property. An additional "#interrupt-cells"
38*4882a593Smuzhiyunproperty defines the number of cells needed to specify a single interrupt.
39*4882a593Smuzhiyun
40*4882a593SmuzhiyunIt is the responsibility of the interrupt controller's binding to define the
41*4882a593Smuzhiyunlength and format of the interrupt specifier. The following two variants are
42*4882a593Smuzhiyuncommonly used:
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun  a) one cell
45*4882a593Smuzhiyun  -----------
46*4882a593Smuzhiyun  The #interrupt-cells property is set to 1 and the single cell defines the
47*4882a593Smuzhiyun  index of the interrupt within the controller.
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun  Example:
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun	vic: intc@10140000 {
52*4882a593Smuzhiyun		compatible = "arm,versatile-vic";
53*4882a593Smuzhiyun		interrupt-controller;
54*4882a593Smuzhiyun		#interrupt-cells = <1>;
55*4882a593Smuzhiyun		reg = <0x10140000 0x1000>;
56*4882a593Smuzhiyun	};
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun	sic: intc@10003000 {
59*4882a593Smuzhiyun		compatible = "arm,versatile-sic";
60*4882a593Smuzhiyun		interrupt-controller;
61*4882a593Smuzhiyun		#interrupt-cells = <1>;
62*4882a593Smuzhiyun		reg = <0x10003000 0x1000>;
63*4882a593Smuzhiyun		interrupt-parent = <&vic>;
64*4882a593Smuzhiyun		interrupts = <31>; /* Cascaded to vic */
65*4882a593Smuzhiyun	};
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun  b) two cells
68*4882a593Smuzhiyun  ------------
69*4882a593Smuzhiyun  The #interrupt-cells property is set to 2 and the first cell defines the
70*4882a593Smuzhiyun  index of the interrupt within the controller, while the second cell is used
71*4882a593Smuzhiyun  to specify any of the following flags:
72*4882a593Smuzhiyun    - bits[3:0] trigger type and level flags
73*4882a593Smuzhiyun        1 = low-to-high edge triggered
74*4882a593Smuzhiyun        2 = high-to-low edge triggered
75*4882a593Smuzhiyun        4 = active high level-sensitive
76*4882a593Smuzhiyun        8 = active low level-sensitive
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun  Example:
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun	i2c@7000c000 {
81*4882a593Smuzhiyun		gpioext: gpio-adnp@41 {
82*4882a593Smuzhiyun			compatible = "ad,gpio-adnp";
83*4882a593Smuzhiyun			reg = <0x41>;
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun			interrupt-parent = <&gpio>;
86*4882a593Smuzhiyun			interrupts = <160 1>;
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun			gpio-controller;
89*4882a593Smuzhiyun			#gpio-cells = <1>;
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun			interrupt-controller;
92*4882a593Smuzhiyun			#interrupt-cells = <2>;
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun			nr-gpios = <64>;
95*4882a593Smuzhiyun		};
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun		sx8634@2b {
98*4882a593Smuzhiyun			compatible = "smtc,sx8634";
99*4882a593Smuzhiyun			reg = <0x2b>;
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun			interrupt-parent = <&gpioext>;
102*4882a593Smuzhiyun			interrupts = <3 0x8>;
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun			#address-cells = <1>;
105*4882a593Smuzhiyun			#size-cells = <0>;
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun			threshold = <0x40>;
108*4882a593Smuzhiyun			sensitivity = <7>;
109*4882a593Smuzhiyun		};
110*4882a593Smuzhiyun	};
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun3) Interrupt wakeup parent
113*4882a593Smuzhiyun--------------------------
114*4882a593Smuzhiyun
115*4882a593SmuzhiyunSome interrupt controllers in a SoC, are always powered on and have a select
116*4882a593Smuzhiyuninterrupts routed to them, so that they can wakeup the SoC from suspend. These
117*4882a593Smuzhiyuninterrupt controllers do not fall into the category of a parent interrupt
118*4882a593Smuzhiyuncontroller and can be specified by the "wakeup-parent" property and contain a
119*4882a593Smuzhiyunsingle phandle referring to the wakeup capable interrupt controller.
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun   Example:
122*4882a593Smuzhiyun	wakeup-parent = <&pdc_intc>;
123