xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/interrupt-controller/img,pdc-intc.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun* ImgTec Powerdown Controller (PDC) Interrupt Controller Binding
2*4882a593Smuzhiyun
3*4882a593SmuzhiyunThis binding specifies what properties must be available in the device tree
4*4882a593Smuzhiyunrepresentation of a PDC IRQ controller. This has a number of input interrupt
5*4882a593Smuzhiyunlines which can wake the system, and are passed on through output interrupt
6*4882a593Smuzhiyunlines.
7*4882a593Smuzhiyun
8*4882a593SmuzhiyunRequired properties:
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun    - compatible: Specifies the compatibility list for the interrupt controller.
11*4882a593Smuzhiyun      The type shall be <string> and the value shall include "img,pdc-intc".
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun    - reg: Specifies the base PDC physical address(s) and size(s) of the
14*4882a593Smuzhiyun      addressable register space. The type shall be <prop-encoded-array>.
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun    - interrupt-controller: The presence of this property identifies the node
17*4882a593Smuzhiyun      as an interrupt controller. No property value shall be defined.
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun    - #interrupt-cells: Specifies the number of cells needed to encode an
20*4882a593Smuzhiyun      interrupt source. The type shall be a <u32> and the value shall be 2.
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun    - num-perips: Number of waking peripherals.
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun    - num-syswakes: Number of SysWake inputs.
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun    - interrupts: List of interrupt specifiers. The first specifier shall be the
27*4882a593Smuzhiyun      shared SysWake interrupt, and remaining specifies shall be PDC peripheral
28*4882a593Smuzhiyun      interrupts in order.
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun* Interrupt Specifier Definition
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun  Interrupt specifiers consists of 2 cells encoded as follows:
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun    - <1st-cell>: The interrupt-number that identifies the interrupt source.
35*4882a593Smuzhiyun                    0-7:  Peripheral interrupts
36*4882a593Smuzhiyun                    8-15: SysWake interrupts
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun    - <2nd-cell>: The level-sense information, encoded using the Linux interrupt
39*4882a593Smuzhiyun                  flags as follows (only 4 valid for peripheral interrupts):
40*4882a593Smuzhiyun                    0 = none (decided by software)
41*4882a593Smuzhiyun                    1 = low-to-high edge triggered
42*4882a593Smuzhiyun                    2 = high-to-low edge triggered
43*4882a593Smuzhiyun                    3 = both edge triggered
44*4882a593Smuzhiyun                    4 = active-high level-sensitive (required for perip irqs)
45*4882a593Smuzhiyun                    8 = active-low level-sensitive
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun* Examples
48*4882a593Smuzhiyun
49*4882a593SmuzhiyunExample 1:
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun	/*
52*4882a593Smuzhiyun	 * TZ1090 PDC block
53*4882a593Smuzhiyun	 */
54*4882a593Smuzhiyun	pdc: pdc@02006000 {
55*4882a593Smuzhiyun		// This is an interrupt controller node.
56*4882a593Smuzhiyun		interrupt-controller;
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun		// Three cells to encode interrupt sources.
59*4882a593Smuzhiyun		#interrupt-cells = <2>;
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun		// Offset address of 0x02006000 and size of 0x1000.
62*4882a593Smuzhiyun		reg = <0x02006000 0x1000>;
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun		// Compatible with Meta hardware trigger block.
65*4882a593Smuzhiyun		compatible = "img,pdc-intc";
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun		// Three peripherals are connected.
68*4882a593Smuzhiyun		num-perips = <3>;
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun		// Four SysWakes are connected.
71*4882a593Smuzhiyun		num-syswakes = <4>;
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun		interrupts = <18 4 /* level */>, /* Syswakes */
74*4882a593Smuzhiyun			     <30 4 /* level */>, /* Peripheral 0 (RTC) */
75*4882a593Smuzhiyun			     <29 4 /* level */>, /* Peripheral 1 (IR) */
76*4882a593Smuzhiyun			     <31 4 /* level */>; /* Peripheral 2 (WDT) */
77*4882a593Smuzhiyun	};
78*4882a593Smuzhiyun
79*4882a593SmuzhiyunExample 2:
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun	/*
82*4882a593Smuzhiyun	 * An SoC peripheral that is wired through the PDC.
83*4882a593Smuzhiyun	 */
84*4882a593Smuzhiyun	rtc0 {
85*4882a593Smuzhiyun		// The interrupt controller that this device is wired to.
86*4882a593Smuzhiyun		interrupt-parent = <&pdc>;
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun		// Interrupt source Peripheral 0
89*4882a593Smuzhiyun		interrupts = <0   /* Peripheral 0 (RTC) */
90*4882a593Smuzhiyun		              4>  /* IRQ_TYPE_LEVEL_HIGH */
91*4882a593Smuzhiyun	};
92*4882a593Smuzhiyun
93*4882a593SmuzhiyunExample 3:
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun	/*
96*4882a593Smuzhiyun	 * An interrupt generating device that is wired to a SysWake pin.
97*4882a593Smuzhiyun	 */
98*4882a593Smuzhiyun	touchscreen0 {
99*4882a593Smuzhiyun		// The interrupt controller that this device is wired to.
100*4882a593Smuzhiyun		interrupt-parent = <&pdc>;
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun		// Interrupt source SysWake 0 that is active-low level-sensitive
103*4882a593Smuzhiyun		interrupts = <8 /* SysWake0 */
104*4882a593Smuzhiyun			      8 /* IRQ_TYPE_LEVEL_LOW */>;
105*4882a593Smuzhiyun	};
106